SEOUT_Z

SEOUT_Z enables/disables the single-ended LVCMOS

force the single-ended output to a high-impedance

state. SEOUT provides a single-ended monitor for oper-

ating frequencies as high as 200MHz.

Applications Information

Output Termination

Terminate both outputs of each differential pair through

50

nation. Use identical termination on each output for the

lowest output-to-output skew. Terminate both outputs

when deriving a single-ended signal from a differential

output. For example, using Q0 as a single-ended out-

put requires termination for both Q0 and Q0.

One-to-Five LVPECL/LVCMOS Output Clock and

Data Driver

_______________________________________________________________________________________

7

CLK

CLK_EN

DISABLED

ENABLED

Q_

SEOUT

SEOUT_Z

CLK

Q_

HIGH

IMPEDANCE

Figure 2. MAX9324 CLK_EN Timing Diagram

INPUTS

OUTPUTS

CLK_EN

SEOUT_Z

Q0–Q3

Q

Q

Q

Q00

0

0–Q

Q

Q

Q33

3

3

SEOUT

0

0

Disabled, pulled to logic low

Disabled, pulled to logic high

Enabled, logic low

0

1

Disabled, pulled to logic low

Disabled, pulled to logic high

Disabled, high impedance

1

0

Enabled

Enabled

Enabled

1

1

Enabled

Enabled

Disabled, high impedance

Table 1. Control Input Table