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FDP7N50F Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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FDP7N50F Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 9 page tm November 2007 ©2007 Fairchild Semiconductor Corporation FDP7N50F / FDPF7N50F Rev. A www.fairchildsemi.com 1 UniFET TM FDP7N50F / FDPF7N50F N-Channel MOSFET, FRFET 500V, 6A, 1.15 Ω Features •RDS(on) = 0.95Ω ( Typ.)@ VGS = 10V, ID = 3A • Low gate charge ( Typ. 15nC) • Low Crss ( Typ. 6.3pF) • Fast switching • 100% avalanche tested • Improved dv/dt capability • RoHS compliant Description These N-Channel enhancement mode power field effect transis- tors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advance technology has been especially tailored to mini- mize on-state resistance, provide superior switching perfor- mance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high effi- cient switching mode power supplies and active power factor correction. TO-220 FDP Series G S D TO-220F FDPF Series G S D D G S MOSFET Maximum Ratings T C = 25 oC unless otherwise noted* Thermal Characteristics Symbol Parameter FDP7N50F FDPF7N50F Units VDSS Drain to Source Voltage 500 V VGSS Gate to Source Voltage ±30 V ID Drain Current -Continuous (TC = 25 oC) 6 6* A -Continuous (TC = 100 oC) 3.6 3.6* IDM Drain Current - Pulsed (Note 1) 24 24* A EAS Single Pulsed Avalanche Energy (Note 2) 270 mJ IAR Avalanche Current (Note 1) 6 A EAR Repetitive Avalanche Energy (Note 1) 20 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 4.5 V/ns PD Power Dissipation (TC = 25 oC) 200 38.5 W - Derate above 25oC 1.59 0.3 W/oC TJ, TSTG Operating and Storage Temperature Range -55 to +150 oC TL Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds 300 oC Symbol Parameter FDP7N50F FDPF7N50F Units RθJC Thermal Resistance, Junction to Case 1.4 4.0 oC/W RθCS Thermal Resistance, Junction to Ambient 0.5 - RθJA Thermal Resistance, Junction to Ambient 62.5 62.5 *Drain current limited by maximum junction temperature |
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