W78IE52/W78I052A

Publication Release Date: October 2, 2006

- 11 -

Revision A4

6.

ON-CHIP FLASH EPROM CHARACTERISTICS

The W78IE52 has several modes to program the on-chip Flash EPROM. All these operations are

− A0 (P2.7 −

P2.0, P1.7

− P1.0) and the D7 − D0 (P0.7 − P0.0) serve as the address and data bus respectively for

these operations.

6.1

Read Operation

This operation is supported for customer to read their code and the Security bits. The data will not be

valid if the Lock bit is programmed to low.

6.2

Output Disable Condition

6.3

Program Operation

This operation is used to program the data to Flash EPROM and the security bits. Program operation

6.4

Program Verify Operation

All the programming data must be checked after program operations. This operation should be

performed after each byte is programmed; it will ensure a substantial program margin.

6.5

Erase Operation

An erase operation is the only way to change data from 0 to 1. This operation will erase all the Flash

6.6

Erase Verify Operation

After an erase operation, all of the bytes in the chip must be verified to check whether they have been

successfully erased to 1 or not. The erase verify operation automatically ensures a substantial erase

OE

is low.