TPS51216RUKT datasheet(4/30 Pages) TI1

Part #	TPS51216RUKT

Description	Complete DDR2, DDR3 and DDR3L Memory Power Solution Synchronous Buck Controller, 2-A LDO, Buffered Reference

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Manufacturer	TI1 [Texas Instruments]

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TPS51216

SLUSAB9 – NOVEMBER 2010

www.ti.com

ELECTRICAL CHARACTERISTICS

over operating free-air temperature range, VV5IN=5V, VLDOIN is connected to VDDQ output, VMODE=0V, VS3=VS5=5V (unless

otherwise noted)

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

SUPPLY CURRENT

IV5IN(S0)

V5IN supply current, in S0

TA = 25°C, No load, VS3 = VS5 = 5 V

590

mA

IV5IN(S3)

V5IN supply current, in S3

TA = 25°C, No load, VS3 = 0 V, VS5 = 5 V

500

mA

IV5INSDN

V5IN shutdown current

TA = 25°C, No load, VS3 = VS5 = 0 V

1

mA

IVLDOIN(S0)

VLDOIN supply current, in S0

TA = 25°C, No load, VS3 = VS5 = 5 V

5

mA

IVLDOIN(S3)

VLDOIN supply current, in S3

TA = 25°C, No load, VS3 = 0 V, VS5 = 5 V

5

mA

IVLDOINSDN

VLDOIN shutdown current

TA = 25°C, No load, VS3 = VS5 = 0 V

5

mA

VREF OUTPUT

IVREF = 30 mA, TA = 25°C

1.8000

VVREF

Output voltage

0 mA ≤ IVREF <300 mA, TA = –10°C to 85°C

1.7856

1.8144

V

0 mA ≤ IVREF <300 mA, TA = –40°C to 85°C

1.7820

1.8180

IVREFOCL

Current limit

VVREF = 1.7 V

0.4

0.8

mA

VTTREF OUTPUT

VVTTREF

Output voltage

VVDDQSNS/2

V

|IVTTREF| <100 mA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V

49.2%

50.8%

VVTTREF

Output voltage tolerance to VVDDQ

|IVTTREF| <10 mA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V

49%

51%

IVTTREFOCLSRC

Source current limit

VVDDQSNS = 1.8 V, VVTTREF= 0 V

10

18

mA

IVTTREFOCLSNK

Sink current limit

VVDDQSNS = 1.8 V, VVTTREF = 1.8 V

10

17

mA

IVTTREFDIS

VTTREF discharge current

TA = 25°C, VS3 = VS5 = 0 V, VVTTREF = 0.5 V

0.8

1.3

mA

VTT OUTPUT

VVTT

Output voltage

VVTTREF

V

|IVTT| ≤ 10 mA, 1.2 V ≤ VVDDQSNS ≤ 1.8 V, IVTTREF = 0 A

–20

20

|IVTT| ≤ 1 A, 1.2 ≤ VVDDQSNS ≤ 1.8 V, IVTTREF = 0 A

–30

30

VVTTTOL

Output voltage tolerance to VTTREF

mV

|IVTT| ≤ 2 A, 1.4 V ≤ VVDDQSNS ≤ 1.8 V, IVTTREF = 0 A

–40

40

|IVTT| ≤ 1.5 A, 1.2 V ≤ VVDDQSNS ≤ 1.4 V, IVTTREF = 0 A

–40

40

VVDDQSNS = 1.8 V, VVTT = VVTTSNS = 0.7 V,

IVTTOCLSRC

Source current limit

2

3

IVTTREF = 0 A

A

IVTTOCLSNK

Sink current limit

VVDDQSNS = 1.8V, VVTT = VVTTSNS = 1.1 V, IVTTREF = 0 A

2

3

IVTTLK

Leakage current

TA = 25°C , VS3 = 0 V, VS5 = 5 V, VVTT = VVTTREF

5

IVTTSNSBIAS

VTTSNS input bias current

VS3 = 5 V, VS5 = 5 V, VVTTSNS = VVTTREF

–0.5

0.0

0.5

mA

IVTTSNSLK

VTTSNS leakage current

VS3 = 0 V, VS5 = 5 V, VVTTSNS = VVTTREF

–1

0

1

TA = 25°C, VS3 = VS5 = 0 V, VVDDQSNS = 1.8 V,

IVTTDIS

VTT Discharge current

7.8

mA

VVTT = 0.5 V, IVTTREF = 0 A

VDDQ OUTPUT

VVDDQSNS

VDDQ sense voltage

VREFIN

VDDQSNS regulation voltage

VVDDQSNSTOL

TA = 25°C

–3

3

mV

tolerance to REFIN

IVDDQSNS

VDDQSNS input current

VVDDQSNS = 1.8 V

39

mA

IREFIN

REFIN input current

VREFIN = 1.8 V

–0.1

0.0

0.1

mA

VS3 = VS5 = 0 V, VVDDQSNS = 0.5 V, MODE pin pulled

IVDDQDIS

VDDQ discharge current

12

mA

down to GND through 47k

Ω (Non-tracking)

VS3 = VS5 = 0 V, VVDDQSNS = 0.5 V, MODE pin pulled

IVLDOINDIS

VLDOIN discharge current

1.2

A

down to GND through 100k

Ω (Non-tracking)

SWITCH MODE POWER SUPPLY (SMPS) FREQUENCY

VIN = 12 V, VVDDQSNS = 1.8 V, RMODE = 100 kΩ

300

fSW

VDDQ switching frequency

kHz

VIN = 12 V, VVDDQSNS = 1.8 V, RMODE = 200 kΩ

400

tON(min)

Minimum on time

DRVH rising to falling(1)

60

ns

tOFF(min)

Minimum off time

DRVH falling to rising

200

320

450

(1)

Ensured by design. Not production tested.

4

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