BGF106C

SIM Card Interface Filter and ESD Protection

BGF106C

Data Sheet

7

V2.0, 2009-04-14

Package Outlines

Figure 4

WLP-8-11 (Wafer Level Package)

Footprint

Figure 5

Recommended PCB pad design for reflow soldering

Tape

Figure 6

Tape for BGF106C / WLP-8-11

You can find all of our packages, sorts of packing and others in our Infineon Internet Page “Products”:

http://www.infineon.com/products.

2)

COPLANARITY

0.6

0.08

8x

C

C

STANDOFF

±0.05

0.2

±0.05

0.1 C

0.4

±0.05

1.2

B

A

A

8x

0.25

B

±0.04

1)

3) Primary datum C and seating plane are defined by the domed crowns of the balls

1) Dimension is measured at the maximum solder ball diameter, parallel to primary datum C

2) A1 corner identified by marking

WLP-8-11-N-PO V01

2 x 0.4 = 0.8

A3

A2

B3

C3

B2

B1

C2

C1

(0.2

)

±0.05

(0.2

)

±0.05

Pin A1

Corner Index Area

Solder balls face down

Solder balls face up

WLP-8-11-N-FP V01

0.4

0.8

0.25

WLP-8-11-N-TP V01

Pin A1

Corner Index Area

0.25

0.75

±0.1

4