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MCF52233CAL60A Datasheet(PDF) 3 Page - Freescale Semiconductor, Inc |
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MCF52233CAL60A Datasheet(HTML) 3 Page - Freescale Semiconductor, Inc |
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3 / 54 page  MCF52235 Family Configurations MCF52235 ColdFire Microcontroller Data Sheet, Rev. 9 Freescale Semiconductor 3 1 MCF52235 Family Configurations Table 1. MCF52235 Family Configurations Module 52230 52231 52232 52233 52234 52235 52236 Version 2 ColdFire Core with EMAC (Enhanced Multiply-Accumulate Unit) •••••• • System Clock (MHz) 60 60 50 60 60 60 50 Performance (Dhrystone 2.1 MIPS) 56 56 46 56 56 56 46 Flash / Static RAM (SRAM) 128/32 Kbytes 128/32 Kbytes 128/32 Kbytes 256/32 Kbytes 256/32 Kbytes 256/32 Kbytes 256/32 Kbytes Interrupt Controllers (INTC0/INTC1) •••••• • Fast Analog-to-Digital Converter (ADC) •••••• • Random Number Generator and Crypto Acceleration Unit (CAU) ————— • — FlexCAN 2.0B Module — • —— •• — Fast Ethernet Controller (FEC) with on-chip interface (EPHY) •••••• • Four-channel Direct-Memory Access (DMA) •••••• • Software Watchdog Timer (WDT) •••••• • Programmable Interrupt Timer 2222222 Four-Channel General Purpose Timer •••••• • 32-bit DMA Timers 4444444 QSPI •••••• • UART(s) 3333333 I2C •••••• • Eight/Four-channel 8/16-bit PWM Timer •••••• • General Purpose I/O Module (GPIO) •••••• • Chip Configuration and Reset Controller Module •••••• • Background Debug Mode (BDM) •••••• • JTAG - IEEE 1149.1 Test Access Port1 1 The full debug/trace interface is available only on the 112- and 121-pin packages. A reduced debug interface is bonded on the 80-pin package. •••••• • Package 80 LQFP 112 LQFP 80 LQFP 112 LQFP 80 LQFP 80 LQFP 112 LQFP 112 LQFP 121 MAPBGA 112 LQFP 121 MAPBGA 80 LQFP |
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