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MCM63P819K Datasheet(PDF) 10 Page - Motorola, Inc |
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MCM63P819K Datasheet(HTML) 10 Page - Motorola, Inc |
10 / 20 page MCM63P737K •MCM63P819K 10 MOTOROLA FAST SRAM WRITE TRUTH TABLE Cycle Type SGW SW SBa SBb SBc (See Note 1) SBd (See Note 1) Read H H X X X X Read H L H H H H Write Byte a H L L H H H Write Byte b H L H L H H Write Byte c (See Note 1) H L H H L H Write Byte d (See Note 1) H L H H H L Write All Bytes H L L L L L Write All Bytes L X X X X X NOTE: 1. Valid only for MCM63P737K. ABSOLUTE MAXIMUM RATINGS (See Note 1) Rating Symbol Value Unit Notes Power Supply Voltage VDD VSS – 0.5 to 4.6 V I/O Supply Voltage VDDQ VSS – 0.5 to VDD V Input Voltage Relative to VSS for Any Pin Except VDD Vin, Vout VSS – 0.5 to VDD + 0.5 V Input Voltage (Three–State I/O) VIT VSS – 0.5 to VDDQ + 0.5 V Output Current (per I/O) Iout ±20 mA Package Power Dissipation PD 1.6 W 2 Temperature Under Bias Tbias –10 to 85 °C Storage Temperature Tstg –55 to 125 °C NOTES: 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded. Functional operation should be restricted to RECOMMENDED OPER- ATING CONDITIONS. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. 2. Power dissipation capability is dependent upon package characteristics and use environment. See Package Thermal Characteristics. PACKAGE THERMAL CHARACTERISTICS Rating Symbol Max Unit Notes TQFP Junction to Ambient (@ 200 lfm) Single–Layer Board Four–Layer Board R θJA 40 25 °C/W 1, 2 Junction to Board (Bottom) R θJB 17 °C/W 3 Junction to Case (Top) R θJC 9 °C/W 4 PBGA Junction to Ambient (@ 200 lfm) Single–Layer Board Four–Layer Board R θJA 38 22 °C/W 1, 2 Junction to Board (Bottom) R θJB 14 °C/W 3 Junction to Case (Top) R θJC 5 °C/W 4 NOTES: 1. Junction temperature is a function of on–chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient temperature, air flow, board population, and board thermal resistance. 2. Per SEMI G38–87. 3. Indicates the average thermal resistance between the die and the printed circuit board. 4. Indicates the average thermal resistance between the die and the case top surface via the cold plate method (MIL SPEC–883 Method 1012.1). This device contains circuitry to protect the inputs against damage due to high static volt- ages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maxi- mum rated voltages to this high–impedance circuit. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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