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MCM69R736CZP6R Datasheet(PDF) 1 Page - Motorola, Inc

Part # MCM69R736CZP6R
Description  4M Late Write HSTL
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Manufacturer  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MCM69R736CZP6R Datasheet(HTML) 1 Page - Motorola, Inc

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MCM69R736C
•MCM69R818C
1
MOTOROLA FAST SRAM
4M Late Write HSTL
The MCM69R736C/818C is a 4M–bit synchronous late write fast static RAM
designed to provide high performance in secondary cache and ATM switch,
Telecom, and other high speed memory applications. The MCM69R818C
(organized as 256K words by 18 bits) and the MCM69R736C (organized as 128K
words by 36 bits) are fabricated in Motorola’s high performance silicon gate
BiCMOS technology.
The differential clock (CK) inputs control the timing of read/write operations of
the RAM. At the rising edge of CK, all addresses, write enables, and synchronous
selects are registered. An internal buffer and special logic enable the memory to
accept write data on the rising edge of CK, a cycle after address and control sig-
nals. Read data is also driven on the rising edge of CK.
The RAM uses HSTL inputs and outputs. The adjustable input trip–point
(Vref) and output voltage (VDDQ) gives the system designer greater flexibility in
optimizing system performance.
The synchronous write and byte enables allow writing to individual bytes or
the entire word.
The impedance of the output buffers is programmable, allowing the outputs to
match the impedance of the circuit traces which reduces signal reflections.
• Byte Write Control
• Single 3.3 V +10%, –5% Operation
• HSTL — I/O (JEDEC Standard JESD8–6 Class I Compatible)
• HSTL — User Selectable Input Trip–Point
• HSTL — Compatible Programmable Impedance Output Drivers
• Register to Register Synchronous Operation
• Asynchronous Output Enable
• Boundary Scan (JTAG) IEEE 1149.1 Compatible
• Differential Clock Inputs
• Optional x18 or x36 Organization
• MCM69R736C/818C–4 = 4 ns
MCM69R736C/818C–4.4 = 4.4 ns
MCM69R736C/818C–5 = 5 ns
MCM69R736C/818C–6 = 6 ns
• Sleep Mode Operation (ZZ pin)
• 119–Bump, 50 mil (1.27 mm) Pitch, 14 mm x 22 mm Plastic Ball Grid Array
(PBGA) Package
Order this document
by MCM69R736C/D
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MCM69R736C
MCM69R818C
ZP PACKAGE
PBGA
CASE 999–02
REV 1
8/10/99
© Motorola, Inc. 1999
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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