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MPC8343CZQADDB Datasheet(PDF) 7 Page - Freescale Semiconductor, Inc |
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MPC8343CZQADDB Datasheet(HTML) 7 Page - Freescale Semiconductor, Inc |
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7 / 79 page  MPC8343EA PowerQUICC II Pro Integrated Host Processor Hardware Specifications, Rev. 10 Freescale Semiconductor 7 Electrical Characteristics 2.1.2 Power Supply Voltage Specification Table 2 provides the recommended operating conditions for the MPC8343EA. Note that the values in Table 2 are the recommended and tested operating conditions. Proper device operation outside these conditions is not guaranteed. Input voltage DDR DRAM signals MVIN –0.3 to (GVDD + 0.3) V 2, 5 DDR DRAM reference MVREF –0.3 to (GVDD + 0.3) V 2, 5 Three-speed Ethernet signals LVIN –0.3 to (LVDD + 0.3) V 4, 5 Local bus, DUART, CLKIN, system control and power management, I2C, and JTAG signals OVIN –0.3 to (OVDD + 0.3) V 3, 5 PCI OVIN –0.3 to (OVDD + 0.3) V 6 Storage temperature range TSTG –55 to 150 °C— Notes: 1 Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and functional operation at the maximums is not guaranteed. Stresses beyond those listed may affect device reliability or cause permanent damage to the device. 2 Caution: MV IN must not exceed GVDD by more than 0.3 V. This limit can be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 3 Caution: OV IN must not exceed OVDD by more than 0.3 V. This limit can be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 4 Caution: LV IN must not exceed LVDD by more than 0.3 V. This limit can be exceeded for a maximum of 20 ms during power-on reset and power-down sequences. 5 (M,L,O)V IN and MVREF may overshoot/undershoot to a voltage and for a maximum duration as shown in Figure 2. 6 OVIN on the PCI interface can overshoot/undershoot according to the PCI Electrical Specification for 3.3-V operation, as shown in Figure 3. Table 2. Recommended Operating Conditions Parameter Symbol Recommended Value Unit Notes Core supply voltage VDD 1.2 V ± 60 mV V 1 PLL supply voltage AVDD 1.2 V ± 60 mV V 1 DDR and DDR2 DRAM I/O voltage GVDD 2.5 V ± 125 mV 1.8 V ± 90 mV V— Three-speed Ethernet I/O supply voltage LVDD1 3.3 V ± 330 mV 2.5 V ± 125 mV V— Three-speed Ethernet I/O supply voltage LVDD2 3.3 V ± 330 mV 2.5 V ± 125 mV V— Table 1. Absolute Maximum Ratings1 (continued) Parameter Symbol Max Value Unit Notes |
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