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UBA2071ATS Datasheet(PDF) 10 Page - NXP Semiconductors |
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UBA2071ATS Datasheet(HTML) 10 Page - NXP Semiconductors |
10 / 35 page UBA2071_A_1 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 01 — 23 June 2008 10 of 35 NXP Semiconductors UBA2071; UBA2071A Half bridge control IC for CCFL backlighting When the voltage on the EN pin goes over Vth(H)1(EN) after the IC has been disabled (EN pin below Vth(L)(EN)) the IC will start up in DC blocking capacitor charging mode3. When the voltage on the EN pin goes over Vth(H)1(EN) after the IC has been off (EN pin below Vth(L)(EN) or VDD below Vstop(VDD)) the IC will start up in DC blocking capacitor charging mode. When the voltage on the EN pin goes over Vth(H)2(EN) the IC will continue with the initial ignition frequency sweep and normal operation mode. Figure 6, EN configuration, shows three examples of how the enable input can be used: 1. Digital enable input with DC blocking capacitor charging. R1 and C1 define a fixed DC blocking capacitor charging time. Remark: The digital input signal high level has to be above the maximum value of Vth(H)2(EN). 2. Sensing of HV supply and DC blocking capacitor voltages via the EN pin. The IC will start in DC blocking capacitor charging mode if VVDD is above Vstartup(VDD) and VHV is above . It will then go into initial ignition frequency sweep and normal operation mode once VCblock has been charged to . 3. Sensing of HV supply and DC blocking capacitor voltages via the EN pin combined with digital enable input. In DC blocking capacitor charging mode the low-side power switch (QLS in Figure 3) is turned on for a period ((1/fsw(max)) − tno) and then the high-side power switch (QHS in Figure 3) is turned on for a period ((1/fsw(max)) − tno) followed by a period of (3/fsw(min)) during which both power switches are off. This is repeated until the mode is left. When leaving the DC blocking capacitor charging mode by raising the EN pin above Vth(H)2(EN), the running cycle of the DC blocking capacitor charging mode will first be completed (see Figure 7). 3. When the enable input is kept high during the time that the IC is off, because the supply voltage is too low, the IC might not start in DC blocking capacitor charging mode. Fig 6. EN configuration 014aaa253 UBA2071 EN C1 R1 enable (1) UBA2071 EN R4 VCblock VHv (2) R3 R2 Cblock UBA2071 EN R4 VCblock VHv (3) R3 R2 Cblock R5 disable R2/R4 () R2/R3 () 1 ++ () V th(H)1(EN) × R4/R2 () R4/R3 () 1 + + () V th(H)2(EN) R4/R2 V HV × – × () |
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