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AT89LP51-20PU Datasheet(PDF) 4 Page - ATMEL Corporation |
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AT89LP51-20PU Datasheet(HTML) 4 Page - ATMEL Corporation |
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4 / 113 page  4 3709B–MICRO–12/10 AT89LP51/52 - Preliminary 1.5 Pin Description Table 1-1. AT89LP51/52 Pin Description Pin Number Symbol Type Description TQFP PLCC PDIP VQFN 1761 P1.5 I/O I/O P1.5: I/O Port 1 bit 5. MOSI: SPI master-out/slave-in. In UART SPI mode this pin is an output. During In- System Programming, this pin is an input. 2 8 72 P1.6 I/O I/O P1.6: I/O Port 1 bit 6. MISO: SPI master-in/slave-out. In UART SPI mode this pin is an input. During In- System Programming, this pin is an output. 39 8 3P1.7 I/O I/O P1.7: I/O Port 1 bit 7. SCK: SPI Clock. In UART SPI mode this pin is an output. During In-System Programming, this pin is an input. 4109 4 RST I/O RST: External Reset input (Reset polarity depends on POL pin. See “External Reset” on page 32.). The RST pin can output a pulse when the internal Watchdog reset is active. 511 105 P3.0 I/O I P3.0: I/O Port 3 bit 0. RXD: Serial Port Receiver Input. 6 12 6 NC Not internally connected 713 117 P3.1 I/O O P3.1: I/O Port 3 bit 1. TXD: Serial Port Transmitter Output. 8 14 12 8 P3.2 I/O I P3.2: I/O Port 3 bit 2. INT0: External Interrupt 0 Input or Timer 0 Gate Input. 915 139 P3.3 I/O I P3.3: I/O Port 3 bit 3. INT1: External Interrupt 1 Input or Timer 1 Gate Input 10 16 14 10 P3.4 I/O I/O P3.4: I/O Port 3 bit 4. T1: Timer/Counter 0 External input or output. 11 17 15 1 P3.5 I/O I/O P3.5: I/O Port 3 bit 5. T1: Timer/Counter 1 External input or output. 12 18 16 12 P3.6 I/O O P3.6: I/O Port 3 bit 6. WR: External memory interface Write Strobe (active-low). 13 19 17 13 P3.7 I/O O P3.7: I/O Port 3 bit 7. RD: External memory interface Read Strobe (active-low). 14 20 18 14 P4.7 I/O O P4.7: I/O Port 4 bit 7. XTAL2: Output from inverting oscillator amplifier. It may be used as a port pin if the internal RC oscillator or external clock is selected as the clock source. 15 21 19 15 P4.6 I/O I P4.6: I/O Port 4 bit 6. XTAL1: Input to the inverting oscillator amplifier and internal clock generation circuits. It may be used as a port pin if the internal RC oscillator is selected as the clock source. 16 22 20 16 GND I Ground 17 23 17 NC Not internally connected 18 24 21 18 P2.0 I/O O P2.0: I/O Port 2 bit 0. A8: External memory interface Address bit 8. 19 25 22 19 P2.1 I/O O P2.1: I/O Port 2 bit 1. A9: External memory interface Address bit 9. 20 26 23 20 P2.1 I/O O P2.2: I/O Port 2 bit 2. A10: External memory interface Address bit 10. |
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