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IPD105N04LG Datasheet(PDF) 3 Page - Infineon Technologies AG |
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IPD105N04LG Datasheet(HTML) 3 Page - Infineon Technologies AG |
3 / 9 page IPD105N04L G Parameter Symbol Conditions Unit min. typ. max. Dynamic characteristics Input capacitance C iss - 1400 1900 pF Output capacitance C oss - 330 440 Reverse transfer capacitance Crss -16- Turn-on delay time t d(on) - 3.7 - ns Rise time t r - 2.4 - Turn-off delay time t d(off) -16- Fall time t f - 2.8 - Gate Charge Characteristics 5) Gate to source charge Q gs - 4.8 - nC Gate charge at threshold Q g(th) - 2.2 - Gate to drain charge Q gd - 1.9 - Switching charge Q sw - 4.6 - Gate charge total Q g -18 23 Gate plateau voltage V plateau - 3.5 - V Gate charge total Q g V DD=20 V, I D=30 A, V GS=0 to 4.5 V - 8 11 nC Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 10 V - 16.4 - Output charge Q oss V DD=20 V, V GS=0 V -13- Reverse Diode Diode continuous forward current I S - - 35 A Diode pulse current I S,pulse - - 280 Diode forward voltage V SD V GS=0 V, I F=40 A, T j=25 °C - 0.94 1.2 V Reverse recovery charge Q rr V R=20 V, I F=I S, di F/dt =400 A/µs -16- nC 5) See figure 16 for gate charge parameter definition T C=25 °C Values V GS=0 V, V DS=20 V, f =1 MHz V DD=20 V, V GS=10 V, I D=30 A, R G=1.6 Ω V DD=20 V, I D=30 A, V GS=0 to 10 V Rev. 1.0 page 3 2007-12-06 |
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