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PIC24HJ32GP204 Datasheet(PDF) 4 Page - Microchip Technology |
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PIC24HJ32GP204 Datasheet(HTML) 4 Page - Microchip Technology |
4 / 272 page PIC24HJ32GP202/204 AND PIC24HJ16GP304 DS70289G-page 4 © 2011 Microchip Technology Inc. Communication Modules: • 4-wire SPI - Framing supports I/O interface to simple codecs - Supports 8-bit and 16-bit data - Supports all serial clock formats and sampling modes •I2C™ - Full Multi-Master Slave mode support - 7-bit and 10-bit addressing - Bus collision detection and arbitration - Integrated signal conditioning - Slave address masking •UART - Interrupt on address bit detect - Interrupt on UART error - Wake-up on Start bit from Sleep mode - 4-character TX and RX FIFO buffers - LIN bus support -IrDA® encoding and decoding in hardware - High-Speed Baud mode - Hardware Flow Control with CTS and RTS Analog-to-Digital Converters (ADCs): • 10-bit, 1.1 Msps or 12-bit, 500 ksps conversion: - Two and four simultaneous samples (10-bit ADC) - Up to 13 input channels with auto-scanning - Conversion start can be manual or synchronized with one of four trigger sources - Conversion possible in Sleep mode - ±2 LSb max integral nonlinearity - ±1 LSb max differential nonlinearity CMOS Flash Technology: • Low-power, high-speed Flash technology • Fully static design • 3.3V (±10%) operating voltage • Industrial and extended temperature • Low-power consumption Packaging: • 28-pin SDIP/SOIC/SSOP/QFN-S • 44-pin QFN/TQFP Note: See Table 1 for the exact peripheral features per device. |
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