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IR3721MPBF Datasheet(PDF) 11 Page - International Rectifier |
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IR3721MPBF Datasheet(HTML) 11 Page - International Rectifier |
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11 / 16 page  IR3721 DATA SHEET Page 11 of 16 www.irf.com 09/15/08 LAYOUT GUIDELINES Refer to figures 7 through 11 for guidance laying out the IR3721. These guidelines also apply to resistive current sensing. The following guidelines will minimize sources of noise and error, which is required because millivolt level signals correspond to amps of inductor current. 1. Place the capacitor Ccs2 close to the VO and VCS pins of the IR3721. Treat VO and VCS as a differential signal pair back to the IC as shown in the elliptical area designated #1 of figure 8. 2. Sense the inductor (or shunt) Kelvin style at its terminals. Route the leads back as a differential pair. Refer to area #2 of figure 8. 3. Route signal VOUT back to the IC VK pin on its own dedicated trace. Refer to area #3 of figure 8. 4. Place the thermistor near the inductor. Refer to area #4 of figure 8. Route the thermistor leads back to the rest of the network using differential traces. Mount the rest of the thermistor network consisting of Rs, Rp, and R1 close to the IC. 5. Use an isolated dedicated ground plane connected only to components associated with the IR3721 that connect to GND as shown in figure 9. Connect this dedicated ground plane at one location only to the ground of the monitored voltage. The thermally relived via in figure eight illustrates this connection. 6. Bypass IC VDD pin 5 to GND pin 4 with a high quality 0.1 μF ceramic capacitor. Refer to area #6 of figure 8. 7. Bypass the IC VK pin to GND with a high quality 0.1 μF ceramic capacitor. Refer to area #7 of figure 8. DI_FILT GND Rs C_VK 0.1uF Rth Rp R1 R_DI_FILT C_DI_FILT VOUT U1 IR3721 CS 1 VO 2 RT 3 GND_1 4 VCC 5 GND_4 6 GND_3 7 DI 8 VK 9 VCC_1 10 C_VDD 0.1uF Rcs1 L1 1 2 Ccs1 VOUT VDD Rcs2 Ccs2 0 Figure 7 Example schematic |
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