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M48Z2M1Y Datasheet(PDF) 1 Page - STMicroelectronics |
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M48Z2M1Y Datasheet(HTML) 1 Page - STMicroelectronics |
1 / 20 page August 2010 Doc ID 5135 Rev 5 1/20 1 M48Z2M1Y M48Z2M1V 5 V or 3.3 V, 16 Mbit (2 Mb x 8) ZEROPOWER® SRAM Features ■ Integrated, ultra low power SRAM, power-fail control circuit, and batteries ■ Conventional SRAM operation; unlimited WRITE cycles ■ 10 years of data retention in the absence of power ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages (VPFD = Power-fail deselect voltage): –M48Z2M1Y: VCC = 4.5 to 5.5 V 4.2 V ≤ VPFD ≤ 4.5 V –M48Z2M1V: VCC = 3.0 to 3.6 V 2.8 V ≤ VPFD ≤ 3.0 V M48Z2M1V not recommended for new design. Contact ST sales office for availability. ■ Batteries are internally isolated until power is applied ■ Pin and function compatible with JEDEC standard 2 Mb x 8 SRAMs ■ RoHS compliant – Lead-free second level interconnect 36 1 PLDIP36 module (PL) www.st.com |
Similar Part No. - M48Z2M1Y_10 |
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Similar Description - M48Z2M1Y_10 |
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