Electronic Components Datasheet Search |
|
IC-OCCDIP16 Datasheet(PDF) 4 Page - IC-Haus GmbH |
|
IC-OCCDIP16 Datasheet(HTML) 4 Page - IC-Haus GmbH |
4 / 9 page iC-OC INTEGRATING LIGHT-VOLTAGE CONVERTER Rev D1, Page 4/9 ELECTRICAL CHARACTERISTICS Operating Conditions: VDD = 5 V ±10 %, RL(VDD/AOUT) = 1 kΩ, Tj = 0...85 °C unless otherwise noted Item Symbol Parameter Conditions Unit No. Min. Typ. Max. Total Device 001 VDD Permissible Supply Voltage Range 4.5 5.5 V 002 I(VDD) Supply Current in VDD 100 700 µA 003 Vc()hi Clamp Voltage hi at DIN, CLK, DOUT, AOUT Vc()hi = V() − VDD, I() = 10 mA, other pins open 0.3 1.5 V 004 Vc()lo Clamp Voltage lo at DIN, CLK, DOUT, AOUT I() = -10 mA, other pins open -1.5 -0.3 V 005 Aph() Radiant Sensitive Area ca. 0.97 x 0.47 mm² 006 λ ar Spectral Application Range S(λar) = 0.25 x S(λ)max 300 950 nm Analogue Output AOUT 201 V0() Output Voltage at no illuminance V0() = VDD − V(AOUT)max, AOUT active (* see below) 0.7 1.4 V 202 ∆ Vd() Variation of Output Voltage at no illuminance ∆ Vd() = V(AOUT)t1 − V(AOUT)t2, ∆ t = t2 − t1 = 1 ms -10 10 mV 203 Vs() Saturation Voltage Tenfold illuminance VDD = 4.5 V 1.4 V VDD = 5 V 1.45 V VDD = 5.5 V 1.5 V 204 ∆ V() Repeatability (standard deviation at repeated measurement) 20 measurements at constant LED illuminance, Vav(AOUT) ≈ 2.91 V, ∆t = 25 µs 15 mV 205 Vlin() Output Voltage Linearity Range Vlin() = VDD − V0() − V(AOUT) 1.7 V 206 K Transfer Factor output voltage vs. light power BMST assembly incl. sealing; λLED = 628 nm, ∆λ = ±23 nm 0.22 0.27 0.32 V/pWS λLED = 880 nm, ∆λ = ±40 nm 0.13 0.16 0.19 V/pWS 207 ∆ klin Transfer Factor Deviation within linearity range -5 5 % 208 I() Leakage Current V(AOUT) = 0...VDD, AOUT high impedance (* see below) -2 2 µA Shift-Register DIN, CLK, DOUT 301 Vt()hi Threshold Voltage hi at DIN, CLK 2.2 V 302 Vt()lo Threshold Voltage lo at DIN, CLK 0.8 V 303 Vt()hys Hysteresis at DIN, CLK Vt()hys = Vt()hi − Vt()lo 250 1300 mV 304 Ii() Input Current in DIN, CLK V() = 0...VDD -1 1 µA 305 f() Permissible Frequency at CLK 10 MHz 306 tw()hi Permis. Pulse Width hi at CLK 20 ns 307 tw()lo Permis. Pulse Width lo at CLK 20 ns 308 tplh Propagation Delay: CLK hi → lo until DOUT lo → hi CL(DOUT) = 50 pF (see Fig. 2) 40 ns 309 tphl Propagation Delay: CLK hi → lo until DOUT hi → lo CL(DOUT) = 50 pF (see Fig. 2) 40 ns 310 tpon Propagation Delay: CLK lo → hi until AOUT active CL(VDD/AOUT) = 1 nF (see Fig. 2) 800 ns 311 tpoff Propagation Delay: CLK lo → hi until AOUT high impedance CL(VDD/AOUT) = 1 nF (see Fig. 2) 100 ns 312 Vs()hi Saturation Voltage hi at DOUT Vs()hi = VDD − V(), I() = -1 mA 0.4 V 313 Vs()lo Saturation Voltage lo at DOUT I() = 1 mA 0.4 V Low Voltage Detection 401 VDDon Turn-on Threshold VDD Increasing voltage at VDD 2.1 3.8 V 402 VDDoff Undervoltage Threshold VDD Decreasing voltage at VDD 1.0 2.1 V 403 VDDhys Hysteresis VDDhys = VDDon − VDDoff 0.5 2 V (*) AOUT active: SOUT1 or SOUT2 closed; AOUT high impedance: SOUT1 and SOUT2 open. |
Similar Part No. - IC-OCCDIP16 |
|
Similar Description - IC-OCCDIP16 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEET.NET |
Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |