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CMX625 Datasheet(PDF) 8 Page - CML Microcircuits

Part # CMX625
Description  ISDN TA POTS Interface
Download  34 Pages
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Manufacturer  CMLMICRO [CML Microcircuits]
Direct Link  http://www.cmlmicro.com
Logo CMLMICRO - CML Microcircuits

CMX625 Datasheet(HTML) 8 Page - CML Microcircuits

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ISDN TA POTS Interface
CMX625
 2001 Consumer Microcircuits Limited
8
D/625/2
1.5.2
Terminal Mode (TE)
Terminal mode (TE) frame structure consists of 3 channels of 4 bytes each repeated at 8kHz, i.e. 96 bits
in 125
µs or a data rate of 768kbps. The Data Clock (DCL) operates at twice the data rate, i.e. 1.536MHz.
Figure 3 shows the TE mode frame structure.
125µs
CHANNEL 0
CHANNEL 1
CHANNEL 2
B1
B2
MON0
C/I0
D
M
R
M
X
CHANNEL 0
IC1
IC2
MON1
C/I1
M
R
M
X
CHANNEL 1
TIC
CHANNEL 2
Not Used
Not Used
Not Used
DU/DD
FSC
DCL
M
S
B
L
S
B
FSC
= 8kHz
DCL
= 1.536MHz
DD, DU = 768kbps
Figure 3 Terminal Mode Frame Structure
‘Channel 0’ is used for passing user data (2B+D channels) and controlling (MON0 and C/I0) the Layer 1
transceiver. Only ‘Channel 1’ is used by the CMX625. ‘Channel 2’ is reserved for D channel arbitration.
The 12 byte frame contains the following channels:
(i)
The ‘B’ channels consist of two 64kbps data channels, labelled B1 and B2, and transfer B channel
data to and from the network.
(ii) The ‘Monitor’ channels consist of two programming channels, labelled MON0 and MON1. Each
channel consists of 8 bits of data and has two associated pair of handshake bits that control data
flow, MX and MR (monitor transmit and receive). The handshake procedure is described in section
1.5.4. The MON1 channel is used for programming and controlling devices attached to the IOM-2
interface. The CMX625 is programmed via the MON1 channel (see section 1.5.15). The MON0
channel is not used. Monitor channel contention is avoided by a “speak when spoken to” system
whereby the CMX625 is given a unique address, programmed with the 3 Slot Address pins (SA0 to
SA2) and 1 Device Select pin (DS) and only responds when that address is broadcast by the master
device (see section 1.5.14). The Monitor channel address byte is shown below:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MON Channel
Address
Byte
1
Slot
Address
SA2
Slot
Address
SA1
Slot
Address
SA0
Device
Select
DS
0
0
0


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