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FX602P3 Datasheet(PDF) 7 Page - CML Microcircuits |
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FX602P3 Datasheet(HTML) 7 Page - CML Microcircuits |
7 / 29 page Calling Line Identifier FX602 © 1998 Consumer Microcircuits Limited 7 D/602/7 1.5 General Description 1.5.1 Mode Control Logic The FX602's operating mode and the source of the DET and IRQN outputs are determined by the logic levels applied to the MODE and ZP input pins; ZP MODE Mode DET o/p from IRQN o/p from 0 0 Tone Alert Detect Tone Alert Signal Detection End of Tone Alert Signal. Ring or Line Polarity Reversal Detector. 0 1 FSK Receive FSK Level Detector FSK Data Retiming [1]. Ring or Line Polarity Reversal Detector. 1 0 'Zero-Power' Ring or Line Polarity Reversal Detector. Ring or Line Polarity Reversal Detector. 1 1 'Zero-Power' Ring or Line Polarity Reversal Detector. - [1] If enabled. In the 'Zero-Power' modes, power is removed from all of the internal circuitry except for the Ring or Line Polarity Reversal Detector and the DET and IRQN outputs. 1.5.2 Input Signal Amplifier This amplifier is used to convert the balanced FSK and Tone Alert signals received over the telephone line to an unbalanced signal of the correct amplitude for the FSK receiver and Tone Alert Detector circuits. Figure 3a : Input Signal Amplifier, balanced input configuration The design equations for this circuit are; Differential voltage gain VAOP / V(b-a) = R8/R6 R6 = R7 = 470k Ω R10 = 160k Ω R9 = R8 x R10 / (R8 - R10) The target differential voltage gain depends on the expected signal levels between the A and B wires and the FX602's internal threshold levels, which are proportional to the supply voltage. The FX602 has been designed to meet the applicable specifications with R8 = 470k Ω at VDD = 3.3V nominal, rising to 680k Ω at VDD = 5.0V, and R9 should be 240kΩ at VDD = 3.3V and 200kΩ at VDD = 5.0V as shown in section 1.4 and Fig 3c. |
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