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AT24C256C-CUL-T Datasheet(PDF) 6 Page - ATMEL Corporation

Part # AT24C256C-CUL-T
Description  serial electrically erasable and programmable read-only memory
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

AT24C256C-CUL-T Datasheet(HTML) 6 Page - ATMEL Corporation

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Atmel AT24C256C
8568C–SEEPR–5/10
4.
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is normally pulled high with an external device. Data on the
SDA pin may change only during SCL low time periods (refer to Figure 2). Data changes during SCL high periods
will indicate a start or stop condition as defined below.
Figure 4-1.
Data Validity
SDA
SCL
DATA STABLE
DATA STABLE
DATA
CHANGE
START CONDITION: A high-to-low transition of SDA with SCL high is a start condition that must precede any
other command (refer to Figure 2-2).
Figure 4-2.
Start and Stop Definition
SDA
SCL
P
O
T
S
T
R
A
T
S
STOP CONDITION: A low-to-high transition of SDA with SCL high is a stop condition. After a read sequence, the
stop command will place the EEPROM in a standby power mode (refer to Figure 3).
ACKNOWLEDGE: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words.
The EEPROM sends a “0” during the ninth clock cycle to acknowledge that it has received each word.
STANDBY MODE: The Atmel
® AT24C256C features a low-power standby mode that is enabled upon power-up
and after the receipt of the stop bit and the completion of any internal operations.


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