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ATA5021-TAPY Datasheet(PDF) 5 Page - ATMEL Corporation |
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ATA5021-TAPY Datasheet(HTML) 5 Page - ATMEL Corporation |
5 / 13 page 5 9145D–AUTO–05/10 ATA5021 The clock frequency determines all time periods of the logical part as shown in Section 7. “Elec- trical Characteristics” on page 9 under the subheading “Timing”. 3.3 Supply Voltage Monitoring, Pin 5 During ramp-up of the supply voltage and in the case of supply-voltage drops, the integrated power-on reset (POR) circuitry sets the internal logic to a defined basic status and generates a reset pulse at the reset output, pin 5. A hysteresis in the POR threshold prevents the circuit from oscillating. During ramp-up of the supply voltage, the reset output stays active for a specified period of time (t 0) in order to bring the microcontroller into its defined reset status (see Figure 3-1 on page 5). 3.4 Switch-over Mode Time, Pin 3 The switch-over mode time enables the synchronous operation of microcontroller and watchdog. When the power-on reset time has elapsed, the watchdog has to be switched to monitoring mode by the microcontroller by a “low” signal transmitted to the mode pin (pin 3) within the time-out period, t 1. If the low signal does not occur within t1 (see Figure 3-1 on page 5), the watchdog generates a reset pulse, t 6, and t1 starts again. Microcontroller and watchdog are syn- chronized with the switch-over mode time, t 1, each time a reset pulse is generated. Figure 3-1. Power-on Reset and Switch-over Mode 81.20 0.47 63.47 63.75 1.6% 81.20 1.04 136.32 135.00 1.9% 81.20 4.75 595.56 592.50 0.7% 81.20 10.49 1253.21 1240.00 1.3% 100.00 0.23 40.07 38.88 –2.1% 100.00 0.47 78.07 78.00 1.2% 100.00 1.04 167.76 164.00 –1.7% 100.00 4.75 733.17 730.00 0.9% 100.00 10.49 1542.84 1530.00 0.5% 119.50 0.23 47.81 46.38 –1.7% 119.50 0.47 93.20 93.00 0.8% 119.50 1.04 200.37 200.25 1.1% 119.50 4.75 875.90 870.00 0.5% 119.50 10.49 1843.26 1835.00 0.9% Table 3-1. Comparison Table Clock Period Calculation versus Measurement on Test Board R1 (k Ω)C1 (nF) Period “T” (µs) by New Formula Period “T” (µs) by Measurement Deviation of New Formula versus Measurement VDD Reset out Mode Pin 3 Pin 5 Pin 6 t0 t1 t6 |
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