AD622

Rev. D | Page 11 of 16

GAIN SELECTION

precisely, by whatever impedance appears between Pin 1 and

Pin 8. The AD622 is designed to offer gains as close as possible

to popular integer values using standard 1% resistors. Table 5

1

k

5

.

50

−

Ω

=

G

R

G

To minimize gain error, avoid high parasitic resistance in series

coefficient less than 10 ppm/°C for the best performance.

Table 5. Required Values of Gain Resistors

Desired

Gain

Calculated

Gain

2

51.1 k

1.988

5

12.7 k

4.976

10

5.62 k

9.986

20

2.67 k

19.91

33

1.58 k

32.96

40

1.3 k

39.85

50

1.02 k

50.50

65

787

65.17

100

511

99.83

200

255

199.0

500

102

496.1

1000

51.1

989.3

INPUT AND OUTPUT OFFSET VOLTAGE

The low errors of the AD622 are attributable to two sources:

input and output errors. The output error is divided by G when

referred to the input. In practice, the input errors dominate at

high gains and the output errors dominate at low gains. The

Total Error RTI = input error + (output error/G)

Total Error RTO = (input error × G) + output error

REFERENCE TERMINAL

The reference terminal potential defines the zero output voltage

and is especially useful when the load does not share a precise

ground with the rest of the system. The reference terminal provides

a direct means of injecting a precise offset to the output, with an

allowable range of 2 V within the supply voltages. Parasitic

resistance should be kept to a minimum for optimum CMR.

INPUT PROTECTION

The AD622 features 400 Ω of series thin film resistance at its

inputs and safely withstands input overloads of up to ±15 V or

±60 mA for up to an hour at room temperature. This is true for

all gains and power on and off, which is particularly important

because the signal source and amplifier can be powered

separately. For longer time periods, the input current should not

exceed 6 mA. For input overloads beyond the supplies, clamping

the inputs to the supplies (using a diode such as a BAV199)

reduces the required resistance, yielding lower noise.

Large Input Voltages at Large Gains

When operating at high gain, large differential input voltages

may cause more than 6 mA of current to flow into the inputs.

This condition occurs when the maximum differential voltage

exceeds the following critical voltage:

This is true for differential voltages of either polarity.

The maximum allowed differential voltage can be increased by

adding an input protection resistor in series with each input.

The value of each protection resistor should be as follows:

RF INTERFERENCE

RF rectification is often a problem when amplifiers are used in

applications where there are strong RF signals. The disturbance

may appear as a small dc offset voltage. High frequency signals

can be filtered with a low-pass, RC network placed at the input

of the instrumentation amplifier, as shown in Figure 18. In

addition, this RC input network also provides additional input

overload protection (see the Input Protection section).

REF

+IN

–IN

AD622

+

0.1µF

10µF

+

0.1µF

10µF

1nF

47nF

1nF

R

4.02kΩ

R

4.02kΩ

Figure 18. RFI Suppression Circuit for AD622 Series In-Amps

The filter limits the input signal bandwidth to the following

cutoff frequencies:

)

(2

2

1

C

D

DIFF

C

C

R

FilterFreq

+

π

=

C

CM

RC

FilterFreq

π

=

2

1