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KSZ8895 Datasheet(PDF) 5 Page - Infineon Technologies AG |
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KSZ8895 Datasheet(HTML) 5 Page - Infineon Technologies AG |
5 / 115 page Micrel, Inc. KSZ8895MQ/RQ/FMQ January 2011 5 M9999-012011-1.2 Port 5 PHY 5 P5-MII/RMII Interface............................................................................................................................37 Port 5 MAC 5 SW5-MII Interface for the KSZ8895MQ/FMQ......................................................................................38 Port 5 MAC 5 Switch SW5-RMII Interface for the KSZ8895RQ .................................................................................39 SNI Interface Operation ..............................................................................................................................................41 Advanced Functionality................................................................................................................................................42 QoS Priority Support ...................................................................................................................................................42 Port-Based Priority..................................................................................................................................................42 802.1p-Based Priority .............................................................................................................................................42 DiffServ-Based Priority ...........................................................................................................................................43 Spanning Tree Support...............................................................................................................................................43 Rapid Spanning Tree Support ....................................................................................................................................44 Tail Tagging Mode ......................................................................................................................................................45 IGMP Support .............................................................................................................................................................46 Port Mirroring Support ................................................................................................................................................46 VLAN Support .............................................................................................................................................................46 Rate Limiting Support .................................................................................................................................................47 Ingress Rate Limit...................................................................................................................................................47 Egress Rate Limit ...................................................................................................................................................48 Transmit Queue Ratio Programming......................................................................................................................48 Filtering for Self-Address, Unknown Unicast/Multicast Address and Unknown VID Packet/IP Multicast ..................48 Configuration Interface ...............................................................................................................................................48 I 2C Master Serial Bus Configuration.......................................................................................................................48 SPI Slave Serial Bus Configuration ........................................................................................................................49 MII Management Interface (MIIM) ..........................................................................................................................52 Serial Management Interface (SMI)........................................................................................................................52 Register Description .....................................................................................................................................................54 Global Registers .........................................................................................................................................................56 Register 0 (0x00): Chip ID0 ....................................................................................................................................56 Register 1 (0x01): Chip ID1 / Start Switch..............................................................................................................56 Register 2 (0x02): Global Control 0 ........................................................................................................................56 Register 3 (0x03): Global Control 1 ........................................................................................................................57 Register 4 (0x04): Global Control 2 ........................................................................................................................58 Register 5 (0x05): Global Control 3 ........................................................................................................................59 Register 6 (0x07): Global Control 4 ........................................................................................................................60 Register 7 (0x07): Global Control 5 ........................................................................................................................60 Register 8 (0x08): Global Control 6 ........................................................................................................................60 Register 9 (0x09): Global Control 7 ........................................................................................................................61 Register 10 (0x0A): Global Control 8......................................................................................................................62 Register 11 (0x0B): Global Control 9......................................................................................................................62 Register 12 (0x0C): Global Control 10 ...................................................................................................................63 Register 13 (0x0D): Global Control 11 ...................................................................................................................63 Register 14 (0x0E): Power Down Management Control 1 .....................................................................................63 Register 15 (0x0F): Power Down Management Control 2....................................... Error! Bookmark not defined. Port Registers .............................................................................................................................................................65 |
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