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MIC184BMM Datasheet(PDF) 11 Page - Micrel Semiconductor |
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MIC184BMM Datasheet(HTML) 11 Page - Micrel Semiconductor |
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11 / 20 page  May 2006 11 MIC184 MIC184 Micrel MIC184’spowerconsumptiondropsto1µAtypicalinshutdown mode. All registers may be read from, or written to, while in shutdown mode. Serial bus activity will slightly increase the MIC184’s power consumption. Entering shutdown mode will not affect the state of INT when the device is in comparator mode (MODE = 0). However, If the device is shut down while in interrupt mode, the INT pin will be deasserted and the internal latch (STS) holding the interrupt status will be cleared. Therefore, no interrupts will be generated while the MIC184 is in shutdown mode, and the interrupt status will not be retained. It is important to note, however, that the cause of the last temperature event will be retained in the MIC184. This is described further in “Comparator and Interrupt Modes” below. The diode fault detection mechanism (see “Diode Faults”) requires one or more A/D conversion cycles to detect external sensor faults. Hence, no diode faults will be detected while the device is in shutdown. Comparator and Interrupt Modes Depending on the setting of the MODE bit in the configura- tion register, the INT output will behave either as an interrupt request signal or a thermostatic control signal. Thermostatic operation is known as comparator mode. The INT output is asserted whenever the measured temperature, as reported in the TEMP register, exceeds the threshold programmed in theT_SETregister for the number of conversions specified by Fault_Queue(describedbelow).Incomparatormode,INTwill remain asserted unless and until the measured temperature falls below the value in the T_HYST register for Fault_Queue conversions. No action on the part of the host is required for operation in comparator mode. Note that entering shutdown mode will not affect the state of INT when the device is in comparator mode. In interrupt mode, once a temperature event has caused STS to be set, and the INT output to be asserted, they will not be automatically deasserted when the measured temperature falls below T_HYST. They can only be deasserted by reading any of the MIC184's internal registers or by putting the device into SHUTDOWN mode. If the most recent temperature event was an overtemperature condition, STS will not be set again, and INT cannot be reasserted, until the device has detected thatTEMP<T_HYST.Similarly,ifthemostrecenttemperature event was an undertemperature condition, STS will in be set again, and INT cannot be reasserted, until the device has detected that TEMP > T_SET. This keeps the internal logic of the MIC184 backward compatible with that of the LM75 and similar devices. There is a software override for this: while the MIC184 is operating in interrupt mode, the part can be unconditionally set to monitor for an overtemperature condi- tion, regardless of what caused the last temperature event. This is done by clearing the MODE bit, and then immediately resetting it to 1. Following this sequence the next temperature event detected will be an overtemperature condition, regard- less of whether the last temperature event was the result of an overtemperature or undertemperature condition. In both modes, the MIC184 will be responsive to overtem- perature events upon power up. Fault_Queue AFault_Queue (programmable digital filter) is provided in the MIC184 to prevent false tripping due to thermal or electrical noise. Two bits, CONFIG[4:3], set the depth of Fault_Queue. Fault_Queue then determines the number of consecutive temperature events (TEMP > T_SET or TEMP < T_HYST) which must occur in order for the condition to be considered valid. As an example, assume the MIC184 is in comparator mode, and CONFIG[4:3] is programmed with 10b. Then the measured temperature would have to exceed T_SET for four consecutive A/D conversions before INT would be asserted or the status bit set. Similarly, TEMP would have to be less than T_HYST for four consecutive conversions before INT would be reset. Like any filter, the Fault_Queue function also has the effect of delaying the detection of temperature events. In this example, it would take 4 × tCONV to detect a temperature event. The depth of Fault_Queue vs. D[4:3] of the configuration register is shown in Table 4. Handling Interrupts The MIC184 may be either polled by the host, or request the host’s attention via the INT pin. In the case of polled opera- tion, the host periodically reads the contents of CONFIG to check the state of the status bit. The act of reading CONFIG clears the status bit, STS. If more than one event that sets the status bit occurs before the host polls the MIC184, only the fact that at least one such event has occurred will be apparent to the host. If TEMP < T_HYST or TEMP > T_SET for Fault_Queue con- versions, the status bit STS will be set in the CONFIG register. This action cannot be masked. However, a temperature event will only generate an interrupt signal on INT if inter- rupts from the MIC184 are enabled (IM = 0 and MODE = 1 in the configuration register). Reading any register following an interrupt will cause INT to be deasserted, and will clear STS. The host should read the contents of the configuration register after receiving an interrupt to confirm that the MIC184 was the source of the interrupt. This is shown in Figure 7. As noted above, putting the device into shutdown mode will also deassert INT and clear STS. Therefore, this usually should not be done before completing the appropriate inter- rupt service routine(s). Since temperature-to-digital conversions continue while INT is asserted, it is possible that temperature could change be- tween the MIC184’s assertion of its INT output and the host’s response to the interrupt. It is good practice when servicing interruptsforthehosttoreadthecurrenttemperaturetoconfirm that the condition that caused the interrupt still exists. ] 3 : 4 [ G I F N O C h t p e D e u e u Q _ t l u a F 0 0 * n o i s r e v n o c 1 1 0 s n o i s r e v n o c 2 0 1 s n o i s r e v n o c 4 1 1 s n o i s r e v n o c 6 g n it t e s t l u a f e D * Table 4. Fault_Queue Depth Settings |
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