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R5F2LA52ANFP Datasheet(PDF) 1 Page - Renesas Technology Corp |
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R5F2LA52ANFP Datasheet(HTML) 1 Page - Renesas Technology Corp |
1 / 106 page R01DS0011EJ0100 Rev.1.00 Page 1 of 102 Dec 21, 2010 R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, R8C/LA8A Group RENESAS MCU Datasheet 1. Overview 1.1 Features The R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, and R8C/LA8A Group of single-chip MCUs incorporate the R8C CPU core, which implements a powerful instruction set for a high level of efficiency and supports a 1 Mbyte address space, allowing execution of instructions at high speed. In addition, the CPU core integrates a multiplier for high-speed operation processing. Power consumption is low, and the supported operating modes allow additional power control. These MCUs are designed to maximize EMI/EMS performance. Integration of many peripheral functions, including multifunction timer and serial interface, helps reduce the number of system components. The R8C/LA3A Group, R8C/LA5A Group, R8C/LA6A Group, and R8C/LA8A Group have data flash (1 KB × 2 blocks). 1.1.1 Applications Household appliances, office equipment, audio equipment, consumer products, etc. R01DS0011EJ0100 Rev.1.00 Dec 21, 2010 |
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