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SY58604UMG Datasheet(PDF) 1 Page - Micrel Semiconductor |
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SY58604UMG Datasheet(HTML) 1 Page - Micrel Semiconductor |
1 / 13 page SY58604U 3.2Gbps Precision, LVPECL Buffer with Internal Termination and Fail Safe Input Precision Edge is a registered trademark of Micrel, Inc. Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com April 2008 M9999-041508-C hbwhelp@micrel.com or (408) 955-1690 General Description The SY58604U is a 2.5/3.3V, high-speed, fully differential LVPECL buffer optimized to provide less than 10pspp total jitter. The SY58604U can process clock signals as fast as 2.5GHz or data patterns up to 3.2Gbps. The differential input includes Micrel’s unique, 3-pin input termination architecture that interfaces to LVPECL, LVDS or CML differential signals, (AC- or DC-coupled) as small as 100mV (200mVpp) without any level-shifting or termination resistor networks in the signal path. For AC-coupled input interface applications, an integrated voltage reference (VREF-AC) is provided to bias the VT pin. The output is 800mV LVPECL, with extremely fast rise/fall times guaranteed to be less than 110ps. The SY58604U operates from a 2.5V ±5% supply or 3.3V ±10% supply and is guaranteed over the full industrial temperature range (–40°C to +85°C). For applications that require CML or LVDS outputs, consider the SY58603U and the SY58605U, buffers with 400mV and 325mV output swings respectively. The SY58604U is part of Micrel’s high-speed, Precision Edge ® product line. Datasheets and support documentation can be found on Micrel’s web site at: www.micrel.com. Functional Block Diagram Precision Edge ® Features ∑ Precision 800mV LVPECL buffer ∑ Guaranteed AC performance over temperature and voltage: – DC-to > 3.2Gbps throughput – <350ps typical propagation delay (IN-to-Q) – <110ps rise/fall times ∑ Fail Safe Input – Prevents output from oscillating when input is invalid ∑ Ultra-low jitter design – <1psRMS cycle-to-cycle jitter – <10psPP total jitter – <1psRMS random jitter – <10psPP deterministic jitter ∑ High-speed LVPECL output ∑ 2.5V ±5% or 3.3V ±10% power supply operation ∑ Industrial temperature range: –40°C to +85°C ∑ Available in 8-pin (2mm x 2mm) DFN package Applications ∑ All SONET clock and data distribution ∑ Fibre Channel clock and data distribution ∑ Gigabit Ethernet clock and data distribution ∑ Backplane distribution Markets ∑ Storage ∑ ATE ∑ Test and measurement ∑ Enterprise networking equipment ∑ High-end servers ∑ Access ∑ Metro area network equipment |
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