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LT3694-1EUFDPBF Datasheet(PDF) 11 Page - Linear Technology |
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LT3694-1EUFDPBF Datasheet(HTML) 11 Page - Linear Technology |
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11 / 28 page  LT3694/LT3694-1 11 36941fa APPLICATIONS INFORMATION tOFF(MIN) = 140ns. fMAX1 is the frequency at which the mini- mumdutycycleisexceeded.TheregulatorwillskipONpulses in order to reduce the overall duty cycle at frequencies above fMAX1. It will continue to regulate but with increased inductor current and greatly increased output ripple. The increased peak inductor current in pulse-skipping will also stress the switch transistor at high voltages and high switching frequency. fMAX2 is the frequency at which the maximum duty cycle is exceeded. If there is sufficient charge on the BST capacitor, the regulator will skip OFF periods to increase the overall duty cycle at frequencies above fMAX2. It will continue to regulate but will not have constant-frequency operation. Note that the restriction on the operating input voltage refers to steady-state limits to keep the output in regulation in constant-frequency mode; the circuit will tolerate input voltage transients up to the absolute maximum rating. Switching Frequency Once the upper limit for the switching frequency is found from the duty cycle requirements, the frequency may be chosen below the upper limit. Lower frequencies result in lower switching losses, but require larger inductors and capacitors. The user must decide the best trade-off. The switching frequency is set by a resistor connected from the RT pin to ground, or by forcing a clock signal into the SYNC pin (LT3694 only). The LT3694 applies a voltage of 0.75V across this resistor and uses the current to set the oscillator speed. The switching frequency is given by the following formula: f SW = 49.8 R T + 8.8 where fSW is in MHz and RT is in kΩ. The formula is accurate within ±2% over the frequency range. Table 1 shows the typical measured value of RT for several com- mon switching frequencies. Table 1: RT for Common Frequencies SWITCHING FREQUENCY (MHz) RT (k) 0.25 193 0.5 90.2 0.75 56.6 1 40.2 1.25 30.5 1.5 23.8 1.75 19.6 2 16.0 2.25 13.5 2.5 11.4 For external clocks applied to the SYNC pin (LT3694 only), the circuit will support VH logic levels from 1.8V to 5V CMOS or TTL. The duty cycle needs a minimum on time of 100ns and a minimum off time of 100ns. When operating in sync mode, RT should be set to provide a frequency at least 20% below the minimum sync frequency. Inductor Selection and Maximum Output Current A good first choice for the inductor value is: L = V OUT + VF 1.25A • f where f is the switching frequency in MHz, L is the inductor value in μH, VOUT is the output voltage and VF is the catch diode voltage drop. The current in the inductor is a triangle wave with an average value equal to the load current. The peak switch current is equal to the output current plus half the peak-to- peak inductor ripple current. The LT3694 limits its switch current in order to protect itself and the system from overload faults. Therefore, the maximum output current that the LT3694 will deliver depends on the switch current limit, the inductor value and the input and output voltages. When the switch is off, the potential across the inductor is the output voltage plus the catch diode drop. This gives the peak-to-peak ripple current in the inductor: ΔI L = (1− DC) V OUT + VF L•f |
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