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33882 Datasheet(PDF) 6 Page - Freescale Semiconductor, Inc |
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33882 Datasheet(HTML) 6 Page - Freescale Semiconductor, Inc |
6 / 27 page Analog Integrated Circuit Device Data 6 Freescale Semiconductor 33882 PIN CONNECTIONS 16 SCLK Serial Clock The SCLK pin of the control IC is a bit (shift) clock for the SPI port. It transitions one time per bit transferred when in operation. It is idle between command transfers. It is 50% duty cycle, and has CMOS levels. 17 CS Chip Select This pin is connected to a chip select output of the control IC.This input has an internal active 25 μA pull-up and requires CMOS logic levels. 18 SO Serial Output This pin is connected to the SPI Serial Data Input pin of the control IC or to the SI pin of the next device in a daisy chain. This output will remain tri-stated unless the device is selected by a low CS pin or the MODE pin goes low. The output signal generated will have CMOS logic levels and the output data will transition on the falling edges of SCLK. The serial output data provides fault information for each output and is returned MSB first when the device is addressed. 23 VDD Logic Supply Voltage This pin is connected to the 5.0 V power supply of the system. A decoupling capacitor is required from VDD to ground. Table 2. QFN Pin Function Description Pin Pin Name Formal Name Definition |
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