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CY7C1020DV33-10ZSXI Datasheet(PDF) 6 Page - Cypress Semiconductor |
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CY7C1020DV33-10ZSXI Datasheet(HTML) 6 Page - Cypress Semiconductor |
6 / 12 page CY7C1020DV33 Document #: 38-05461 Rev. *F Page 6 of 12 Write Cycle No. 1 (CE Controlled)[17, 18] Write Cycle No. 2 (BLE or BHE Controlled) Switching Waveforms (continued) tHD tSD tSCE tSA tHA tAW tPWE tWC BW t DATA I/O ADDRESS CE WE BHE,BLE tHD tSD tBW tSA tHA tAW tPWE tWC tSCE DATA I/O ADDRESS BHE,BLE CE WE Notes: 17. Data I/O is high impedance if OE or BHE and/or BLE = VIH. 18. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. [+] Feedback |
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