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CY7C68003 Datasheet(PDF) 11 Page - Cypress Semiconductor |
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CY7C68003 Datasheet(HTML) 11 Page - Cypress Semiconductor |
11 / 27 page CY7C68003 Document Number: 001-15775 Rev. *I Page 11 of 27 USB Data Transmit (PID) In this mode, the link transmits data on the USB with a Packet Identifier (PID). The link first drives a TX CMD byte as illustrated in Figure 9 on page 11 to transmit a USB packet. The link sets the Command Code to 01b (Transmit) and places the USB Packet Identifier (PID) on DATA[3:0] (see Table 9 on page 9). TX2UL throttles the data using NXT such that the link provides the next byte in the cycle after NXT is detected as high. Figure 8. USB Data Transmit (PID) USB Packet Receive As shown in Figure 10 on page 12, when TX2UL receives the USB data it gains ownership of the data bus by asserting DIR. The DIR is previously either high or low. If DIR is low (see Figure 9), TX2UL asserts both DIR and NXT so that the link knows immediately that this is a USB receive packet. If DIR is high (see Figure 10 on page 12), TX2UL deasserts NXT and drives an RX CMD with the RxEvent field set to the RxActive state. The TX2UL starts driving data in the following cycle or outputs RX CMD until USB data is available. Valid USB packet data is presented to the link by asserting NXT and placing a byte on the bus. When NXT is low, TX2UL drives the RX CMD byte. All RX CMD changes during the USB packet receive are signaled when NXT is low. If NXT is never low during the packet receive, all RX CMD changes are replaced with a single RX CMD update. This update is sent at the end of the USB packet receive, when the ULPI bus is available. The RX CMD update always conveys the current RX CMD values and not the previous one. Figure 9. USB Receive While DIR is Previously Low CLOCK DATA[7:0] DIR STP NXT D1 TX CMD (PID) D2 D3 CLOCK DATA[7:0] DIR STP NXT Turn around RX CMD PID D1 RX CMD D2 D3 Turn around [+] Feedback |
Similar Part No. - CY7C68003_10 |
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Similar Description - CY7C68003_10 |
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