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CY8C53 Datasheet(PDF) 8 Page - Cypress Semiconductor |
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CY8C53 Datasheet(HTML) 8 Page - Cypress Semiconductor |
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8 / 102 page  PRELIMINARY PSoC® 5: CY8C53 Family Datasheet Document Number: 001-55035 Rev. *G Page 8 of 102 Figure 2-4 and Figure 2-5 show an example schematic and an example PCB layout, for the 100-pin TQFP part, for optimal analog performance on a 2-layer board. The two pins labeled VDDD must be connected together. The two pins labeled VCCD must be connected together, with capacitance added, as shown in Figure 2-4 and Power System on page 23. The trace between the two VCCD pins should be as short as possible. The two pins labeled VSSD must be connected together. Figure 2-4. Example Schematic for 100-pin TQFP Part with Power Connections Note The two VCCD pins must be connected together with as short a trace as possible. A trace under the device is recommended, as shown in Figure 2-5. Vssb 10 Ind 11 Vboost 12 Vbat 13 Vssd 14 XRES 15 Vcca 63 Vssa 64 Vdda 65 Vssd 66 SIO, P12[2] 67 SIO, P12[3] 68 P4[0] 69 P4[1] 70 OA2out, P0[0] 71 OA0out, P0[1] 72 OA0+, P0[2] 73 OA0-, REF0, P0[3] 74 Vddio0 75 P5[0] 16 P5[1] 17 P5[2] 18 P5[3] 19 P1[0], SWIO, TMS 20 P1[1], SWDIO, TCK 21 P1[2] 22 P1[3], SWV, TDO 23 P1[4], TDI 24 P1[5], nTRST 25 P6[7] 9 P2[5] 1 P2[6] 2 P2[7] 3 P12[4], SIO 4 P12[5], SIO 5 P6[4] 6 P6[5] 7 P6[6] 8 OA1out, P3[6] 51 OA3out, P3[7] 52 SIO, P12[0] 53 SIO, P12[1] 54 kHzXout, P15[2] 55 kHzXin, P15[3] 56 NC 57 NC 58 NC 59 NC 60 NC 61 NC 62 U2 CY8C55xx Vssd Vdda Vcca Vssd Vssa Vssa Vssd Vssd Vssd Vssd 0.1 uF C8 Vssd Vddd Vddd Vddd Vddd Vssa Vssa Vddd Vssd 1 uF C9 0.1 uF C10 0.1 uF C11 0.1 uF C14 0.1 uF C16 0.1 uF C12 0.1 uF C6 0.1 uF C2 1 uF C15 1 uF C1 Vssd Vddd Vssd Vdda Vssd Vccd 10 uF, 6.3 V C13 1 uF C17 Vssa Vdda [+] Feedback |
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