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CY8C5385PVI-042 Datasheet(PDF) 7 Page - Cypress Semiconductor

Part # CY8C5385PVI-042
Description  Programmable System-on-Chip (PSoC )
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY8C5385PVI-042 Datasheet(HTML) 7 Page - Cypress Semiconductor

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PRELIMINARY
PSoC® 5: CY8C53 Family Datasheet
Document Number: 001-55035 Rev. *G
Page 7 of 102
Figure 2-3. 100-pin TQFP Part Pinout
TQFP
( TRACEDATA[1] , GPIO) P2[5]
( TRACEDATA[2] , GPIO) P2[6]
( TRACEDATA[3] , GPIO) P2[7]
(I2C0: SCL, SIO ) P12[4]
(I2C0: SDA, SIO) P12[5]
(GPIO) P6[4]
(GPIO) P6[5]
(GPIO) P6[6]
(GPIO) P6[7]
Vssb
Ind
Vboost
Vbat
Vssd
XRES
(GPIO) P5[0]
(GPIO) P5[1]
(GPIO) P5[2]
(GPIO) P5[3]
(TMS, SWDIO, GPIO) P1[0]
( TCK, SWDCK, GPIO) P1[1]
( configurable XRES, GPIO) P1[2]
(TDO, SWV, GPIO) P1[3]
(TDI, GPIO) P1[4]
( nTRST, GPIO) P1[5]
Vddio0
P0[3] (GPIO , OpAmp0-/ Extref0)
P0[2] (GPIO , OpAmp0+)
P0[1] (GPIO , OpAmp0out)
P0[0] (GPIO , OpAmp2out)
P4[1] (GPIO)
P4[0] (GPIO)
P12[3] (SIO)
P12[2] (SIO)
Vssd
Vdda
Vssa
Vcca
NC
NC
NC
NC
NC
NC
P15[3] (GPIO, kHz XTAL: Xi)
P15[2] (GPIO, kHz XTAL: Xo)
P12[1] (SIO ,I2C1 : SDA)
P12[0] (SIO ,I2C1 : SCL)
P3[7] (GPIO)
P3[6] (GPIO)
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
1
2
3
4
5
6
7
8
9
Lines show Vddio
to I/O supply
association
Note
5. Pins are No Connect (NC) on devices without USB. NC means that the pin has no electrical connection. The pin can be left floating or tied to a supply voltage or ground.
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