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MAX9482EUI Datasheet(PDF) 9 Page - Maxim Integrated Products |
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MAX9482EUI Datasheet(HTML) 9 Page - Maxim Integrated Products |
9 / 18 page accuracy. The bypass capacitors should include a 0.1µF ceramic capacitor between each supply pin and the ground plane, located as close to the package as possible. Additionally, place a 1µF to 10µF ceramic or tantalum capacitor in parallel with each 0.1µF capacitor, and as close to them as possible. Place a 10µF to 15µF low-ESR tantalum capacitor at the VCC, VLM, and VLP power-supply points of entry to the PC board. Place a 100µF to 220µF low-ESR tantalum capacitor at the VEE power-supply point of entry to the PC board. The power- supply traces should lead directly from the board input capacitors to VCC and VEE. To minimize parasitic induc- tance, keep PC traces short and use surface-mount components. Wire-wrapped boards are much too induc- tive, and breadboards are much too capacitive; neither should be used. Power-supply sequencing is required; apply ±5.0 before applying ±2.5V. Exposed-Pad Connection For optimum electrical performance, the EP of the MAX9480/MAX9481/MAX9482 should be soldered to the PC board and electrically connected to VEE with as wide a trace as possible. If using the EP, the 100µF to 220µF low-ESR tantalum capacitor should be used to decouple the EP to the ground plane of the PC board as close to the EP region as possible. For optimum thermal performance, the EP should be additionally connected to a heat sink, as described in the Thermal Protection and Power Dissipation section. Preamp Output Bypassing In addition to the above layout considerations, and inde- pendent of the gain setting, some high-frequency bypassing of the preamp outputs is necessary to prevent instability arising from the high-frequency input imped- ance characteristics of the buffers. A 50 Ω resistor in series with a 2200pF ceramic capacitor should be con- nected between POUT_ and DGND, with a 47pF capaci- tor connected directly between POUT_ and DGND. Choosing Feedback and Gain Resistors The MAX9480/MAX9481/MAX9482 use current-feed- back amplifiers. Figure 2 shows the standard inverting and noninverting configurations. Notice that the gain of the noninverting circuit, Figure 2(b), is 1 plus the mag- nitude of the inverting closed-loop gain. Increasing feedback resistor values decreases peaking. Use the input resistor, RG, to change the magnitude of the gain. Do not use feedback capacitance. DC and Noise Errors There are several error sources to consider when using any operational amplifier, and this applies to the MAX9480/MAX9481/MAX9482 as well. Offset-error terms are given by equations 3 and 4. Voltage and cur- rent-noise errors are root-square summed and there- fore computed separately. In Figure 3, the total output offset voltage is determined by: • The input offset voltage, VOS, times the closed-loop gain (1 + (RF / RG)). • The positive input bias current, IB+, times the source resistor, RS (typically less than 10 Ω), plus the nega- tive input bias current, IB-, times the parallel combi- nation of RG and RF. In current-mode feedback amplifiers, the input bias currents may flow into or out of the device. For this reason, there is no benefit to matching the resistance at both inputs, as is com- mon in voltage-feedback amplifiers. Low-Power, Low-Distortion, Central-Office ADSL Drivers and Integrated Drivers/Receivers _______________________________________________________________________________________ 9 VOUT RF RG RS MAX9480 MAX9481 MAX9482 VIN RT VOUT = - RF ( ) RG ( ) VIN VOUT RF RG RT (a) (b) MAX9480 MAX9481 MAX9482 VOUT = RF [ ( )] RG VIN ( ) VIN 1+ Figure 2. Inverting Gain Configuration and Noninverting Gain Configuration |
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