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CY62148ELL-55SXA Datasheet(PDF) 5 Page - Cypress Semiconductor |
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CY62148ELL-55SXA Datasheet(HTML) 5 Page - Cypress Semiconductor |
5 / 14 page CY62148E MoBL® Document #: 38-05442 Rev. *H Page 5 of 14 Capacitance Parameter[10] Description Test Conditions Max Unit CIN Input capacitance TA = 25 °C, f = 1 MHz, VCC = VCC(Typ) 10 pF COUT Output capacitance 10 pF Thermal Resistance Parameter [10] Description Test Conditions SOIC Package TSOP II Package Unit Θ JA Thermal resistance (junction to ambient) Still air, soldered on a 3 × 4.5 inch, two-layer printed circuit board 75 77 °C/W Θ JC Thermal resistance (junction to case) 10 13 °C/W Figure 2. AC Test Loads and Waveforms Parameter [10] 5.0 V Unit R1 1800 Ω R2 990 Ω RTH 639 Ω VTH 1.77 V Data Retention Characteristics Over the operating range Parameter Description Conditions Min Typ[11] Max Unit VDR VCC for data retention 2 – – V ICCDR [12] Data retention current VCC= VDR, CE > VCC – 0.2 V, VIN > VCC – 0.2 V or VIN < 0.2 V Industrial/ Automotive-A –1 7 µA tCDR Chip deselect to data retention time 0 – – ns tR [13] Operation recovery time TSOP II 45 – – ns SOIC 55 – – ns Notes 10. Tested initially and after any design or process changes that may affect these parameters. 11. Typical values are included for reference and are not guaranteed or tested. Typical values are measured at VCC = VCC(typ), TA = 25 °C. 12. Chip enable (CE) must be HIGH at CMOS level to meet the ISB2 / ICCDR spec. Other inputs can be left floating. 13. Full device operation requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at VCC(min) > 100 µs. 3.0 V VCC OUTPUT R2 30 pF INCLUDING JIG AND SCOPE GND 90% 10% 90% 10% Rise Time = 1 V/ns Fall Time = 1 V/ns OUTPUT V Equivalent to: THEVENIN EQUIVALENT ALL INPUT PULSES RTH R1 [+] Feedback |
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