Document Number : 38-05329 Rev. *I

Page 8 of 13

Switching Waveforms

Figure 1. Read Cycle No. 1 (Address Transition Controlled)[16, 17]

Figure 2. Read Cycle No. 2 (OE Controlled)[17, 18]

Figure 3. Write Cycle No. 1 (WE Controlled)[19, 20, 21]

Notes

17. WE is HIGH for read cycle.

signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal that terminates the write.

22. During this period, the I/Os are in output state and input signals should not be applied.

PREVIOUS DATA VALID

DATA VALID

ADDRESS

DATA OUT

50%

50%

DATA VALID

HIGH IMPEDANCE

HIGH

IMPEDANCE

OE

ADDRESS

DATA OUT

SUPPLY

CURRENT

t

VALID DATA

See Note 22

HZOE

ADDRESS

WE

DATA I/O

OE

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