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CY62256VNLL-70ZXC Datasheet(PDF) 6 Page - Cypress Semiconductor |
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CY62256VNLL-70ZXC Datasheet(HTML) 6 Page - Cypress Semiconductor |
6 / 14 page CY62256VN Document Number: 001-06512 Rev. *D Page 6 of 14 Figure 2. Data Retention Waveform Switching Characteristics Over the Operating Range[9] Parameter Description CY62256VN-70 Unit Min Max Read Cycle tRC Read cycle time 70 – ns tAA Address to data valid – 70 ns tOHA Data hold from address change 10 – ns tACE CE LOW to data valid – 70 ns tDOE OE LOW to data valid – 35 ns tLZOE OE LOW to low Z[10] 5– ns tHZOE OE HIGH to high Z[10, 11] –25 ns tLZCE CE LOW to low Z[10] 10 – ns tHZCE CE HIGH to high Z[10, 11] –25 ns tPU CE LOW to power up 0 – ns tPD CE HIGH to power down – 70 ns Write Cycle[12, 13] tWC Write cycle time 70 – ns tSCE CE LOW to write end 60 – ns tAW Address setup to write end 60 – ns tHA Address hold from write end 0 – ns tSA Address setup to write start 0 – ns tPWE WE pulse width 50 – ns tSD Data setup to write end 30 – ns tHD Data hold from write end 0 – ns tHZWE WE LOW to high Z[10, 11] –25 ns tLZWE WE HIGH to low Z[10] 10 – ns 1.8 V 1.8 V tCDR VDR > 1.4 V DATA RETENTION MODE tR CE VCC Notes 9. Test conditions assume signal transition time of 5 ns or less timing reference levels of VCC/2, input pulse levels of 0 to VCC, and output loading of the specified IOL/IOH and 100-pF load capacitance. 10. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 11. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in (b) of AC Test Loads. Transition is measured ± 200 mV from steady-state voltage. 12. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 13. The minimum write cycle time for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. [+] Feedback |
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