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HT82M75R_1011 Datasheet(PDF) 10 Page - Holtek Semiconductor Inc |
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HT82M75R_1011 Datasheet(HTML) 10 Page - Holtek Semiconductor Inc |
10 / 66 page HT82M75R/HT82M75RE HT82K75R/HT82K75RE Rev. 1.30 10 November 24, 2010 ¨ The three methods are shown as follows: The in- structions ²TABRDC [m]² (the current page, one page=256words), where the table location is de- fined by TBLP (07H) in the current page. And the configuration option TBHP is disabled (default). ¨ The instructions ²TABRDC [m]², where the table lo- cation is defined by registers TBLP (07H) and TBHP (01FH). And the configuration option TBHP is enabled. ¨ The instructions ²TABRDL [m]², where the table lo- cation is defined by register TBLP (07H) in the last page (F00H~FFFH). Only the destination of the lower-order byte in the ta- ble is well-defined, the other bits of the table word are transferred to the lower portion of TBLH, and the re- maining 1-bit words are read as ²0². The Table Higher-order byte register (TBLH) is read only. The ta- ble pointer (TBLP, TBHP) is a read/write register (07H, 1FH), which indicates the table location. Before ac- cessing the table, the location must be placed in the TBLP and TBHP (If the configuration option TBHP is disabled, the value in TBHP has no effect). The TBLH is read only and cannot be restored. If the main rou- tine and the ISR (Interrupt Service Routine) both em- ploy the table read instruction, the contents of the TBLH in the main routine are likely to be changed by the table read instruction used in the ISR. Errors can occur. In other words, using the table read instruction in the main rou- tine and the ISR simultaneously should be avoided. However, if the table read instruction has to be applied in both the main routine and the ISR, the interrupt should be disabled prior to the table read instruction. It will not be enabled until the TBLH has been backed up. All table related instructions require two cycles to complete the operation. These areas may function as normal program memory depending on the require- ments. Once TBHP is enabled, the instruction ²TABRDC [m]² reads the ROM data as defined by TBLP and TBHP value. Otherwise, the configuration option TBHP is disabled, the instruction ²TABRDC [m]² reads the ROM data as defined by TBLP and the current pro- gram counter bits. Table Program Example The following example shows how the table pointer and table data is defined and retrieved from the microcontroller. This example uses raw table data lo- cated in the last page which is stored there using the ORG statement. The value at this ORG statement is ²F00H² which refers to the start address of the last page within the 4K Program Memory of device. The table pointer is setup here to have an initial value of ²06H². This will ensure that the first data read from the data ta- ble will be at the Program Memory address ²F06H² or 6 locations after the start of the last page. Note that the value for the table pointer is referenced to the first ad- dress of the present page if the ²TABRDC [m]² instruc- tion is being used. The high byte of the table data which in this case is equal to zero will be transferred to the TBLH register automatically when the ²TABRDL [m]² in- struction is executed. P r o g r a m M e m o r y P r o g r a m C o u n t e r H i g h B y t e T B L P T B L H S p e c i f i e d b y [ m ] T a b l e C o n t e n t s H i g h B y t e T a b l e C o n t e n t s L o w B y t e Table Read - TBLP only P r o g r a m M e m o r y T B L H S p e c i f i e d b y [ m ] H i g h B y t e o f T a b l e C o n t e n t s L o w B y t e o f T a b l e C o n t e n t s T B L P T B H P Table Read - TBLP/TBHP |
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