CY7C1021BNV33

64 K × 16 Static RAM

Cypress Semiconductor Corporation

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198 Champion Court

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San Jose

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408-943-2600

Document #: 001-06433 Rev. *C

Revised March 8, 2011

64 K × 16 Static RAM

Features

Functional Description[1]

The CY7C1021BNV33 is a high-performance CMOS static RAM

organized as 65,536 words by 16 bits. This device has an

automatic power-down feature that significantly reduces power

consumption when deselected.

Writing to the device is accomplished by taking Chip Enable (CE)

and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is

Reading from the device is accomplished by taking Chip Enable

(CE) and Output Enable (OE) LOW while forcing the Write

Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data

from the memory location specified by the address pins will

at the back of this data sheet for a complete description of read

and write modes.

high-impedance state when the device is deselected (CE HIGH),

the outputs are disabled (OE HIGH), the BHE and BLE are

disabled (BHE, BLE HIGH), or during a write operation (CE LOW,

and WE LOW).

The CY7C1021BNV33 is available in 400-mil-wide SOJ,

standard 44-pin TSOP Type II, and 48-ball mini BGA packages.

Note

1. For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com.

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