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K4T51083QG-HCLE6 Datasheet(PDF) 6 Page - Samsung semiconductor |
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K4T51083QG-HCLE6 Datasheet(HTML) 6 Page - Samsung semiconductor |
6 / 47 page Rev. 1.4 December 2008 DDR2 SDRAM K4T51083QG K4T51163QG 6 of 47 K4T51043QG A B C D E F G H J K L VDD NU/ VSS DQ6 VSSQ VDDQ VDDQ VDDQ VSSQ VSSQ DQS DQS DQ7 DQ0 VDDQ DQ2 VSSQ DQ5 VSSDL VDD CK RAS CK CAS CS A2 A6 A4 A11 A8 NC A13 NC A12 A9 A7 A5 A0 VDD A10/AP VSS VDDQ VSSQ DQ1 DQ3 DQ4 VDDL A1 A3 BA1 VREF VSS CKE WE BA0 VDD VSS DM/ RDQS RDQS NC ODT Note : 1. Pins B3 and A2 have identical capacitance as pins B7 and A8. 2. For a read, when enabled, strobe pair RDQS & RDQS are identical in function and timing to strobe pair DQS & DQS and input masking function is disabled. 3. The function of DM or RDQS/RDQS are enabled by EMRS command. 4. VDDL and VSSDL are power and ground for the DLL. + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ++ + + + 12 34 56 78 9 A B C D E F G H J K L + + Ball Locations (x8) : Populated Ball + : Depopulated Ball Top View (See the balls through the package) 12 3 7 8 9 3.2 x8 package pinout (Top View) : 60ball FBGA Package |
Similar Part No. - K4T51083QG-HCLE6 |
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Similar Description - K4T51083QG-HCLE6 |
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