K4S561632J datasheet(9/15 Pages) SAMSUNG

Part #	K4S561632J

Description	256Mb J-die SDRAM Specification

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Manufacturer	SAMSUNG [Samsung semiconductor]

Direct Link	http://www.samsung.com/Products/Semiconductor

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9 / 15 page

Synchronous DRAM

Rev. 1.22 August 2008

K4S560432J

K4S560832J

K4S561632J

9 of 15

(Recommended operating condition unless otherwise noted, TA = 0 to 70

°C)

Parameter

Symbol

Test Condition

Version

Unit

Note

75

Operating current

(One bank active)

ICC1

Burst length = 1

tRC

≥ tRC(min)

IO = 0 mA

70

mA

1

Precharge standby current in

power-down mode

ICC2P

CKE

≤ VIL(max), tCC = 10ns

2

mA

ICC2PS CKE & CLK ≤ VIL(max), tCC = ∞

2

Precharge standby current in

non power-down mode

ICC2N

CKE

≥ VIH(min), CS ≥ VIH(min), tCC = 10ns

Input signals are changed one time during 20ns

15

mA

ICC2NS

CKE

≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable

10

Active standby current in

power-down mode

ICC3P

CKE

≤ VIL(max), tCC = 10ns

5

mA

ICC3PS CKE & CLK ≤ VIL(max), tCC = ∞

5

Active standby current in

non power-down mode

(One bank active)

ICC3N

CKE

≥ VIH(min), CS ≥ VIH(min), tCC = 10ns

Input signals are changed one time during 20ns

28

mA

ICC3NS

CKE

≥ VIH(min), CLK ≤ VIL(max), tCC = ∞

Input signals are stable

20

mA

Operating current

(Burst mode)

ICC4

IO = 0 mA

Page burst

4banks Activated.

tCCD = 2CLKs

110

mA

1

Refresh current

ICC5

tRC

≥ tRC(min)

160

mA

2

Self refresh current

ICC6

CKE

≤ 0.2V

C3

mA

3

L1.5

mA

4

1. Measured with outputs open.

2. Refresh period is 64ms.

3. K4S5604(08)32J-UC

4. K4S5604(08)32J-UL

5. Unless otherwise noticed, input swing level is CMOS(VIH /VIL=VDDQ/VSSQ).

Notes :

11.0 DC Characteristics (x4, x8)

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