CY8C20224, CY8C20324

CY8C20424, CY8C20524

Document Number: 001-41947 Rev. *K

Page 8 of 40

24-pin Part Pinout

Figure 4. CY8C20324 24-pin PSoC Device

QFN

(Top View)

AI, P2[5]

AI, I2C SCL, SPI SS, P1[7]

AI, I2C SDA, SPI MISO, P1[5]

AI, SPI CLK, P1[3]

1

2

3

4

5

6

18

17

16

15

14

13

P0[2], AI

P0[0], AI

P0[4], AI

AI, P2[3]

AI, P2[1]

P1[6], AI

XRES

P2[0], AI

Notes

floated and not connected to any other signal.

3. These are the ISSP pins, that are not high Z at POR (Power on reset). Refer the PSoC Programmable System-on-Chip Technical Reference Manual for details.

Table 2. 24-pin Part Pinout (QFN [2])

Pin No.

Digital

Analog

Name

Description

1

I/O

I

P2[5]

2

I/O

I

P2[3]

3

I/O

I

P2[1]

4

I

P1[7]

5

I

P1[5]

6

I

P1[3]

SPI CLK

7

I

P1[1]

8

NC

No connection

9

Power

Ground connection

10

I

P1[0]

11

I

P1[2]

12

I

P1[4]

Optional external clock input (EXTCLK)

13

I

P1[6]

14

Input

XRES

Active high external reset with internal pull-down

15

I/O

I

P2[0]

16

I/O

I

P0[0]

17

I/O

I

P0[2]

18

I/O

I

P0[4]

19

I/O

I

P0[6]

20

Power

Supply voltage

21

I/O

I

P0[7]

22

I/O

I

P0[5]

23

I/O

I

P0[3]

Integrating input

24

I/O

I

P0[1]

Integrating input

CP

Power

Vss

Center pad is connected to ground

A = Analog, I = Input, O = Output, OH = 5 mA High Output Drive

[+] Feedback