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LE28FV4001R-25 Datasheet(PDF) 8 Page - Sanyo Semicon Device |
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LE28FV4001R-25 Datasheet(HTML) 8 Page - Sanyo Semicon Device |
8 / 14 page AC Electrical Characteristics at Ta = 0 to +70°C, VDD = 3.3 V ± 0.3 V AC Testing Conditions (See Figure 13) Input rise and fall times: ................10 ns (max) Output load: ....................................1 TTL gate + 30 pF Read Cycle Erase/Programming Cycles Note: All signals must hold valid logic levels during the setup and hold periods. No. 5409-8/14 LE28FV4001M, T, R-20/25 LE28FV4001M, T, R Parameter Symbol -20 -25 Unit min max min max Read cycle time tRC 200 250 ns CE access time tCE 200 250 ns Address access time tAA 200 250 ns OE access time tOE 100 120 ns Output low-impedance time from CE tCLZ 0 0 ns Output low-impedance time from OE tOLZ 0 0 ns Output high-impedance time from CE tCHZ 60 60 ns Output high-impedance time from OE tOHZ 60 60 ns Output valid time from address input tOH 0 0 ns LE28FV4001M, T, R Parameter Symbol -20 -25 Unit min max min max Sector erase cycle time tSE 4 4 ms Byte programming cycle time tBP 35 35 µs Address setup time tAS 0 0 ns Address hold time tAH 50 100 ns CE and WE setup time tCS 0 0 ns CE and WE hold time tCH 0 0 ns OE setup time tOES 10 20 ns OE hold time tOEH 10 20 ns CE pulse width tCP 100 160 ns WE pulse width tWP 100 160 ns WE standby pulse width tWPH 50 50 ns CE standby pulse width tCPH 50 50 ns Data setup time tDS 50 100 ns Data hold time tDH 10 20 ns Reset recovery time tRST 4 4 µs CE pulse width in protect mode tPCP 100 100 ns CE hold time in protect mode tPCH 150 150 ns Address setup time in protect mode tPAS 30 30 ns Address hold time in protect mode tPAH 100 100 ns |
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