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TXS4555 Datasheet(PDF) 9 Page - Texas Instruments |
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TXS4555 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 16 page 0.1 F m 1 F m 1 F m V CC VSIM VBAT GND TXS4555 TXS4555 www.ti.com SBOS550A – FEBRUARY 2011 – REVISED MARCH 2011 APPLICATION INFORMATION The LDO ’s included on the TXS4555 achieve ultra-wide bandwidth and high loop gain, resulting in extremely high PSRR at very low headroom (VBAT – VSIM). The TXS4555 provides fixed regulation at 1.8V or 2.95V. Low noise, enable, low ground pin current make it ideal for portable applications. The device offers sub-bandgap output voltages, current limit and thermal protection, and is fully specified from –40°C to 125°C. Figure 9. Typical Application Circuit for TXS4555 INPUT AND OUTPUT CAPACITOR REQUIREMENTS It is good analog design practice to connect a 1.0 µF low equivalent series resistance (ESR) capacitor across the input supply (VBAT) near the regulator. Also, a 0.1 µF is required for the logic core supply (VDDIO). This capacitor will counteract reactive input sources and improve transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or if the device is located several inches from the power source. The LDO ’s are designed to be stable with standard ceramic capacitors of values 1.0 µF or larger. X5R- and X7R-type capacitors are best because they have minimal variation in value and ESR over temperature. Maximum ESR should be < 1.0 Ω. OUTPUT NOISE In most LDO ’s, the bandgap is the dominant noise source. To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device. INTERNAL CURRENT LIMIT The TXS4555 internal current limit helps protect the regulator during fault conditions. During current limit, the output sources a fixed amount of current that is largely independent of output voltage. For reliable operation, the device should not be operated in a current limit state for extended periods of time. The PMOS pass element in the TXS4555 has a built-in body diode that conducts current when the voltage at VSIM exceeds the voltage at VBAT. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting may be appropriate. DROPOUT VOLTAGE The TXS4555 uses a PMOS pass transistor to achieve low dropout. When (VBAT – VSIM) is less than the dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS(ON) of the PMOS pass element. VDO will approximately scale with output current because the PMOS device behaves like a resistor in dropout. STARTUP The TXS4555 uses a quick-start circuit which allows the combination of very low output noise and fast start-up times. Copyright © 2011, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): TXS4555 |
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