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KS8721SL Datasheet(PDF) 10 Page - Micrel Semiconductor

Part # KS8721SL
Description  3.3V Single Power Supply 10/100BASE-TX/FX MII Physical Layer Transceiver
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Manufacturer  MICREL [Micrel Semiconductor]
Direct Link  http://www.micrel.com
Logo MICREL - Micrel Semiconductor

KS8721SL Datasheet(HTML) 10 Page - Micrel Semiconductor

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Micrel, Inc.
KS8721BL/SL
June 2009
10
M9999-062509-1.3
Strapping Options
(1)
Pin Number
Pin Name
Type
(2)
Pin Function
6, 5,
4, 3
PHYAD[4:1]/
RXD[0:3]
Ipd/O
25
PHYAD0/
INT#
Ipu/O
PHY Address latched at power-up/reset. The default PHY address is 00001.
9
(3)
PCS_LPBK/
RXDV
Ipd/O
Enables PCS_LPBK mode at power-up/reset. PD (default) = Disable, PU = Enable.
11
(3)
ISO/RXER
Ipd/O
Enables ISOLATE mode at power-up/reset. PD (default) = Disable, PU = Enable.
21
(3)
RMII/COL
Ipd/O
Enables RMII mode at power-up/reset. PD (default) = Disable, PU = Enable.
22
(3)
RMII_BTB
CRS
Ipd/O
Enable RMII back-to-back mode at power-up/reset. PD (default) = Disable,
PU = Enable.
27
SPD100/
No FEF/
Ipu/O
Latched into Register 0h bit 13 during power-up/reset. PD = 10Mbps, PU (default) =
100Mbps. If SPD100 is asserted during power-up/reset, this pin is also latched as
LED1 the Speed Support in register 4h. (If FXEN is pulled up, the latched value 0
means no Far_End _Fault.)
28
DUPLEX/
LED2
Ipu/O
Latched into Register 0h bit 8 during power-up/reset. PD = Half-duplex, PU (default) =
Full-duplex. If Duplex is pulled up during reset, this pin is also latched as the Duplex
support in register 4h.
29
NWAYEN/
LED3
Ipu/O
Nway (auto-negotiation) Enable. Latched into Register 0h bit 12 during power-up/reset.
PD = Disable Auto-Negotiation, PU (default) = Enable Auto-Negotiation.
30
PD#
Ipu
Power-Down Enable. PU (default) = Normal operation, PD = Power-Down mode.
Notes:
1.
Strap-in is latched during power-up or reset.
2.
Ipu = Input with internal pull-up.
Ipd/O = Input with internal pull-down during reset; output pin otherwise.
Ipu/O = Input with internal pull-up during reset; output pin otherwise.
See “Reference Circuit” section for pull-up/pull-down and float information.
3.
Some devices may drive MII pins that are designated as output (PHY) on power-up, resulting in incorrect strapping values latched at reset.
It is recommended that an external pull-down via 1kΩ resistor be used in these applications to augment the 8721’s internal pull-down.


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