AN4121 datasheet(7/22 Pages) FAIRCHILD

Part #	AN4121

Description	Design of Power Factor Correction Circuit

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Manufacturer	FAIRCHILD [Fairchild Semiconductor]

Direct Link	http://www.fairchildsemi.com

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7 / 22 page

APPLICATION NOTE

AN4121

7

The value is calculated on the assumption that the

gate-source voltage should be a square waveform, i.e, abrupt

changes with no rising or falling time.

Thus the drive current can not reach 500mA during the rising

or falling time although Rg of 32

Ω is used.

10

Ω is recommended as the Rg in order to the MOSFET

switching loss. The experimental results shows that the gate

peak current goes up to 300mA with 10

Ω.

Diode average current can be calculated by (21). The total

diode loss can be calculated by (22) and then a diode can be

selected considering diode thermal characteristic.

3-2. Control circuit design

1) Output voltage sensing resistor and feedback loop design

R1 is determined by the maximum output over voltage,

∆V

ovp and R2 is determined by (23).

The feedback loop bandwidth must be narrower than 20Hz

for the PFC application. Therefore a capacitor is connected

between INV and EA_OUT to eliminate the 120Hz ripple

voltage by 40dB. The error amp compensation capacitor can

be calculated by (24). To improve the power factor, Ccomp

must be increased than the calculated value. And to improve

the system response, Ccomp must be lowered than the

calculated value.

2) Zero current detection resistor design

Idet current should be less than 3mA, therefore zero current

detection resistor is determined by (25).

3) Start-up circuit design

To start-up the FAN7527B, the start-up current must be

supplied through a start-up resistor. The resistor value is

calculated by (26) and (27). The start-up capacitor must

supply IC operating current before the auxiliary winding

supplies IC operating current maintaining Vcc voltage higher

than the UVLO voltage. Therefore the start-up

capacitor is designed by (28).

The recommended RST values according to CST values are

shown on table 1. To make the Vcc voltage stable, use RST

values listed on the table or lower RST values than the listed

values. Higher RST values can cause the system unstable,

therefore don't use higher RST values.

4) Line voltage sense resistor and current sense resistor

design

The maximum line voltage sensing gain is determined by

(29) at the highest line.

Calculate the pin 3 voltage at the lowest line using Gin(max)

by (30). Then the current sense resistor is determined by

(31), (32) and (34). Once the current sense resistor is

determined, then the minimum line voltage sensing gain,

Gin(max) is determined by (31).

R

g

V

Omax

I

Omax

------------------

16V

500mA

--------------------

32

Ω

==

>

20

()

I

Davg

I

Omax

()

=21

()

P

Diode

V

fIDavg

=22

()

R

1

R

2

-------

V

O

2.5

–

2.5

----------------------- R1

∆V

OVP

40

µA

-------------------

=

,

=

R

2

2.5R

1

V

O

2.5

–

-----------------------

=

,

23

()

C

comp

1

0.01 2

π 120Hz R

1

⋅⋅

⋅

-----------------------------------------------------------

=

24

()

R

idet

N

aux

V

O

⋅

N

P 3mA

⋅

--------------------------

>

Table 1: Recommended RST , CST values

CST

RST

22uF

100k

Ω

33uF

120k

Ω

47uF

120k

Ω

68uF

120k

Ω

R

ST

V

in peak_min

()

V

th st

()max

–

I

STmax

---------------------------------------------------------------------

≤

26

()

P

Rst

V

2

in rms_max

()

R

ST

-------------------------------------

=

1W

≤

27

()

C

ST

I

dcc

2

π f

ac HY ST

()min

⋅⋅

----------------------------------------------------

≥

28

()

V

PIN3

V

in peak_max

()

R

in2

R

in1

R

in2

+

-----------------------------

⋅

=

V

in peak_max

() Gin max

()

3.8V

<

⋅

=

29

()

VOm

()

KVin peak_min

()

R

in2

R

in1

R

in2

+

----------------------------------

∆Vm2 max

()

(30)

⋅⋅

=

R

sense

VOm

()

ILpeak_max

()

-----------------------------------------

KVin peak_min

()

Rin2

R

in1

R

in2

+

----------------------------------

⋅⋅

=

<

2.5

⋅

V

ηVin peak_min

()

4 VOIOmax

()

⋅

------------------------------------------------

(31)

⋅

Rsense

1.8V

ILpeak_max

()

-----------------------------------------

1.8V

ηVin peak_min

()

4 VOIOmax

()

⋅

------------------------------------------------

=

<

32

()

P

Rsense

2

VOIOmax

()

ηVin peak_min

()

------------------------------------------------





 2

R

sense

⋅⋅

=

1W

<

33

()

Rsense

1W

2

---------

ηVin peak_min

()

VOIOmax

()

------------------------------------------------





 2

⋅

<

34

()

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