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AN-6083 Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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AN-6083 Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 9 page AN-6083 APPLICATION NOTE © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com Rev. 1.0.2 • 3/11/09 4 Figure 10.Feedback Circuit The maximum sourcing current of the FB pin is 1.04mA. The phototransistor must be capable of sinking this current to pull FB level down at no load. The value of the biasing resistor RB is determined as: 2 OUT D Z B VV V K mA R −− ×≥ (6) where: VD is the drop voltage of photodiode, approximately 1.2V; VZ is the minimum operating voltage, 2.4V of the shunt regulator; and K is the current transfer rate (CTR) of the opto-coupler. For output voltage VOUT = 5V, with CTR = 100%, the maximum value of RB is 560Ω. Built-In Slope Compensation A flyback converter can be operated in either discontinuous current mode (DCM) or continuous current mode (CCM). There are many advantages to operating the converter in CCM. With the same output power, a converter in CCM exhibits a smaller peak inductor current than in DCM; therefore, a small-sized transformer and a low-rated MOSFET can be applied. On the secondary side of the transformer, the RMS output current of DCM can be twice that of the CCM. Larger wire gauge and output capacitors with larger ripple-current ratings are required. DCM operation also results in higher output-voltage spikes. A large LC filter has to be added. A flyback converter in CCM achieves better performance with a lower component cost. Despite the above advantages of CCM operation, there is one concern—stability. In CCM operation, the output power is proportional to the average inductor current, while the peak current remains controlled. This causes sub-harmonic oscillation when the PWM duty cycle exceeds 50%. Adding slope compensation (reducing the current-loop gain) is an effective way to prevent oscillation. The FAN6791 introduces a synchronized positive-going ramp (VSLOPE) in every switching cycle to stabilize the current loop. Therefore, the FAN6791 can be used to design a cost effective, highly efficient, compact flyback power supply operating in CCM without additional external components. The positive ramp added is: SLOPE SLOPE VV D = Δ× (7) where ΔVSLOPE = 0.37V and D = duty cycle. Figure 11.Synchronized Slope Compensation Constant Power Control To limit the output power of the converter constantly, a power- limit function is included. Sensing the converter input voltage through the VRMS pin, the power limit function generates a relative peak-current-limit threshold voltage for constant power control, as shown in Figure 12. Figure 12. Constant Power Compensation Leading Edge Blanking (LEB) A voltage signal proportional to the MOSFET current develops on the current-sense resistor RS. Each time the MOSFET is turned on, a spike is induced by the diode reverse recovery and by the output capacitances of the MOSFET and diode, inevitably appearing on the sensed signal. Inside the FAN6791, a leading-edge blanking time of about 270ns is introduced to avoid premature termination of MOSFET by the spike. Only a small-value RC filter (e.g. 100Ω + 470pF) is required between the SENSE pin and RS. Still, a non-inductive resistor for the RS is recommended. FB VOUT RB R1 C1 R2 R3 RFB CFB |
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