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FDP18N50 Datasheet(PDF) 11 Page - Fairchild Semiconductor

Part # FDP18N50
Description  PFCPWM Combination Controller
Download  17 Pages
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FDP18N50 Datasheet(HTML) 11 Page - Fairchild Semiconductor

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AN-8027
© 2009 Fairchild Semiconductor Corporation
www.fairchildsemi.com
Rev. 1.0.0 • 8/26/09
11
(Design Example)
Setting the crossover frequency
as 22Hz:
1
2
6
6
2
2.5
5(2
)
70 10
0.9 1.27
2.5
20
10
387
5 270
(2
22)
MV
BOUT
MAX
VC
BOUT
BOUT
VC
GI
K
C
V
Cf
nF
π
π
⋅⋅
=⋅
⋅⋅
×⋅
=⋅
=
×
⋅⋅
9
1
11
362
2
222 20 10
VC
VC
VC
R
k
fC
π
π
==
=
Ω
⋅⋅
⋅⋅ ×
Setting the pole of the compensator at 120Hz:
2
3
11
3.7
2
2120 362 10
VC
VP
VC
CnF
fR
π
π
==
=
⋅⋅
⋅⋅
×
[STEP-10] Transformer Design for PWM
Stage
Figure 19 shows the typical secondary-side circuit of
forward converter for multi-output of PC power application.
A common technique for winding multiple outputs with the
same polarity sharing a common ground is to stack the
secondary windings instead of winding each output
winding separately. This approach improves the load
regulation of the stacked outputs. The winding NS1 in
Figure 19 must be sized to accommodate its output current,
plus the current of the output (+12V) stacked on top of it.
To get tight regulation of 3.3V output, magnetic amplifier
(MAG-AMP) is used. The saturable core of MAG-AMP
prevents the diode DREC from fully conducting by
introducing high impedance until it is saturated. This
allows the effective duty cycle of VREC to be controlled to
be regulated the output voltage.
MAG AMP
Control
MAG
AMP
N
p
+12V
+5V
+3.3
V
-12V
Additiona
l LC filter
Additiona
l LC filter
Additiona
l LC filter
Additiona
l LC filter
N
S
1
N
S
2
V
REC
+
-
D
REC
N
S
3
Figure 19. Typical Secondary-Side Circuit
Once the core for the transformer is determined, the
minimum number of turns for the transformer primary-side
to avoid saturation is given by:
MIN
MIN
BOUT
MAX
P
eSW
VD
N
Af
B
=
Δ
(44)
where Ae is the cross sectional area of the core in m
2, fSW is
the switching frequency, and
ΔB is the maximum flux
density swing in Tesla for normal operation.
ΔB is typically
0.2-0.3 T for most power ferrite cores in the case of a
forward converter.
The turn ratio between the primary-side and secondary-side
winding for the first output is determined by:
11
1
()
MIN
BOUT
MAX
P
SO
F
VD
N
n
NV
V
==
+
(45)
where VF is the diode forward-voltage drop.
Next, determine the proper integer for NS1 resulting in Np
larger than Np
min. Once the number of turns of the first
output is determined, the number of turns of other output
(n-th output) can be determined by:
()
()
()
1
11
On
F n
Sn
S
OF
VV
N
N
VV
+
=⋅
+
(46)
The golden ratio between the secondary-side windings for
the best regulation of 3.3V, 5V, and 12V is known as
2:3:7.
(Design Example)
The minimum PFC output voltage
is 310V and the maximum duty cycle of PWM
controller is 50%. By adding 5% margin to the
maximum duty cycle, DMAX=0.45 is used for
transformer design. Assuming ERL35 (Ae=107mm2)
core is used and
ΔB=0.28, the minimum turns for the
transformer primary side is obtained as:
63
310 0.45
72
107 10
65 10 0.28
MIN
MIN
BOUT
MAX
P
eSW
VD
N
Af
B
==
=
Δ
×⋅ ×
The turns ratio for 5V output is obtained as:
310 0.45
25.6
(
)
(5 0.45)
MIN
BOUT
MAX
P
SO
F
VD
N
n
NV
V
==
=
=
++
The number of turns for the primary-side winding is
determined as:
1
2 25.6 51.2
MIN
pS
P
Nn N
N
=⋅
= ×
=
<
11
3 25.6 76.8
3
MIN
pS
P
S
Nn N
N
N
= ⋅= ×
=
>
=
Then, the turns ratio for 12V output is obtained as:
22
21
11
12 0.7
36.99 7
50.45
OF
SS
OF
VV
NN
VV
+
+
=
⋅=
⋅ =
++
Therefore, the number of turns for each winding is
obtained as:
Np=78, NS1=3, NS2=7 (3+4 stack) and NS3=7.


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