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SG6741SY Datasheet(PDF) 9 Page - Fairchild Semiconductor |
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SG6741SY Datasheet(HTML) 9 Page - Fairchild Semiconductor |
9 / 12 page © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com SG6741 • Rev. 1.3.3 9 Functional Description (Continued) VDD Over-Voltage Protection (OVP) VDD over-voltage protection has been built in to prevent damage due to abnormal conditions. Once the VDD voltage is over the VDD over-voltage protection voltage (VDD-OVP), and lasts for tD-VDDOVP, the PWM pulses is disabled until the VDD voltage drops below the UVLO, then starts up again. Over-voltage conditions are usually caused by open feedback loops. Limited Power Control The FB voltage increases every time the output of the power supply is shorted or overloaded. If the FB voltage remains higher than a built-in threshold for longer than tD-OLP, PWM output is turned off. As PWM output is turned off, the supply voltage VDD begins decreasing. When VDD goes below the turn-off threshold (eg, 10.5V) the controller totally shuts down. VDD is charged up to the turn-on threshold voltage of 16V through the startup resistor until PWM output is restarted. This protection is activated as long as the overloading condition persists. This prevents the power supply from overheating. Noise Immunity Noise on the current sense or control signal may cause significant pulse width jitter, particularly in the continuous-conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near to the SG6741, and increasing the power MO gate resistance improves performance. |
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