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LPC1102 Datasheet(PDF) 11 Page - NXP Semiconductors |
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LPC1102 Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 39 page LPC1102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 18 April 2011 11 of 39 NXP Semiconductors LPC1102 32-bit ARM Cortex-M0 microcontroller • Incorrect/Incomplete feed sequence causes reset/interrupt if enabled. • Flag to indicate watchdog reset. • Programmable 24-bit timer with internal prescaler. • Selectable time period from (Tcy(WDCLK) × 256 × 4) to (Tcy(WDCLK) × 224 × 4) in multiples of Tcy(WDCLK) × 4. • The Watchdog Clock (WDCLK) source can be selected from the Internal RC oscillator (IRC), the Watchdog oscillator, or the main clock. This gives a wide range of potential timing choices of Watchdog operation under different power reduction conditions. It also provides the ability to run the WDT from an entirely internal source that is not dependent on an external crystal and its associated components and wiring for increased reliability. 7.14 Clocking and power control 7.14.1 Crystal oscillators The LPC1102 includes two independent oscillators. These are the Internal RC oscillator (IRC) and the Watchdog oscillator. Each oscillator can be used for more than one purpose as required in a particular application. Following reset, the LPC1102 will operate from the Internal RC oscillator until switched by software. This allows systems to operate without any external crystal and the bootloader code to operate at a known frequency. See Figure 4 for an overview of the LPC1102 clock generation. |
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