LPC1763 datasheet(3/79 Pages) NXP

Part #	LPC1763

Description	32-bit ARM Cortex-M3 microcontroller; up to 512 kB flash and 64 kB SRAM with Ethernet

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Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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LPC1769_68_67_66_65_64_63

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Product data sheet

Rev. 7 — 5 April 2011

3 of 79

NXP Semiconductors

LPC1769/68/67/66/65/64/63

32-bit ARM Cortex-M3 microcontroller

Quadrature encoder interface that can monitor one external quadrature encoder.

One standard PWM/timer block with external count input.

RTC with a separate power domain and dedicated RTC oscillator. The RTC block

includes 20 bytes of battery-powered backup registers.

WatchDog Timer (WDT). The WDT can be clocked from the internal RC oscillator,

the RTC oscillator, or the APB clock.

ARM Cortex-M3 system tick timer, including an external clock input option.

Repetitive interrupt timer provides programmable and repeating timed interrupts.

Each peripheral has its own clock divider for further power savings.

Standard JTAG test/debug interface for compatibility with existing tools. Serial Wire

Debug and Serial Wire Trace Port options.

Emulation trace module enables non-intrusive, high-speed real-time tracing of

instruction execution.

Integrated PMU (Power Management Unit) automatically adjusts internal regulators to

minimize power consumption during Sleep, Deep sleep, Power-down, and Deep

power-down modes.

Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down.

Single 3.3 V power supply (2.4 V to 3.6 V).

Four external interrupt inputs configurable as edge/level sensitive. All pins on Port 0

and Port 2 can be used as edge sensitive interrupt sources.

Non-maskable Interrupt (NMI) input.

Clock output function that can reflect the main oscillator clock, IRC clock, RTC clock,

CPU clock, and the USB clock.

The Wake-up Interrupt Controller (WIC) allows the CPU to automatically wake up from

any priority interrupt that can occur while the clocks are stopped in deep sleep,

Power-down, and Deep power-down modes.

Processor wake-up from Power-down mode via any interrupt able to operate during

Power-down mode (includes external interrupts, RTC interrupt, USB activity, Ethernet

wake-up interrupt, CAN bus activity, Port 0/2 pin interrupt, and NMI).

Brownout detect with separate threshold for interrupt and forced reset.

Power-On Reset (POR).

Crystal oscillator with an operating range of 1 MHz to 25 MHz.

4 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally be used as a

system clock.

PLL allows CPU operation up to the maximum CPU rate without the need for a

high-frequency crystal. May be run from the main oscillator, the internal RC oscillator,

or the RTC oscillator.

USB PLL for added flexibility.

Code Read Protection (CRP) with different security levels.

Unique device serial number for identification purposes.

Available as 100-pin LQFP (14 mm

× 14 mm × 1.4 mm) and TFBGA1 (9 mm × 9 mm ×

0.7 mm) package.

1.

LPC1768 only.

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