IXYS Reserves the Right to Change Limits, Test Conditions, and Dimensions.

IXFQ24N50P2

Fig. 7. Input Admittance

0

5

10

15

20

25

30

35

3.5

4.0

4.5

5.0

5.5

6.0

6.5

7.0

25ºC

- 40ºC

Fig. 8. Transconductance

0

10

20

30

40

50

0

5

10

15

20

25

30

35

125ºC

25ºC

Fig. 9. Forward Voltage Drop of Intrinsic Diode

0

10

20

30

40

50

60

70

80

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

Fig. 10. Gate Charge

0

2

4

6

8

10

0

5

10

15

20

25

30

35

40

45

50

Fig. 11. Capacitance

10

100

1,000

10,000

0

5

10

15

20

25

30

35

40

Ciss

Crss

Coss

Fig. 12. Forward-Bias Safe Operating Area

0.01

0.1

1

10

100

10

100

1000

Single Pulse

25µs

1ms

100µs

10ms